1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pwm/mediate 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek DISP_PWM Controller !! 7 title: MediaTek DISP_PWM Controller Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Jitao Shi <jitao.shi@mediatek.com> 10 - Jitao Shi <jitao.shi@mediatek.com>
>> 11 - Xinlei Lee <xinlei.lee@mediatek.com>
11 12
12 allOf: 13 allOf:
13 - $ref: pwm.yaml# 14 - $ref: pwm.yaml#
14 15
15 properties: 16 properties:
16 compatible: 17 compatible:
17 oneOf: 18 oneOf:
18 - enum: 19 - enum:
19 - mediatek,mt2701-disp-pwm 20 - mediatek,mt2701-disp-pwm
20 - mediatek,mt6595-disp-pwm 21 - mediatek,mt6595-disp-pwm
21 - mediatek,mt8173-disp-pwm 22 - mediatek,mt8173-disp-pwm
22 - mediatek,mt8183-disp-pwm 23 - mediatek,mt8183-disp-pwm
23 - items: 24 - items:
24 - enum: !! 25 - const: mediatek,mt8167-disp-pwm
25 - mediatek,mt6795-disp-pwm <<
26 - mediatek,mt8167-disp-pwm <<
27 - const: mediatek,mt8173-disp-pwm 26 - const: mediatek,mt8173-disp-pwm
28 - items: 27 - items:
29 - enum: 28 - enum:
30 - mediatek,mt8186-disp-pwm 29 - mediatek,mt8186-disp-pwm
31 - mediatek,mt8188-disp-pwm <<
32 - mediatek,mt8192-disp-pwm 30 - mediatek,mt8192-disp-pwm
33 - mediatek,mt8195-disp-pwm 31 - mediatek,mt8195-disp-pwm
34 - mediatek,mt8365-disp-pwm <<
35 - const: mediatek,mt8183-disp-pwm 32 - const: mediatek,mt8183-disp-pwm
36 33
37 reg: 34 reg:
38 maxItems: 1 35 maxItems: 1
39 36
40 "#pwm-cells": 37 "#pwm-cells":
41 const: 2 38 const: 2
42 39
43 interrupts: 40 interrupts:
44 maxItems: 1 41 maxItems: 1
45 42
46 clocks: 43 clocks:
47 items: 44 items:
48 - description: Main Clock 45 - description: Main Clock
49 - description: Mm Clock 46 - description: Mm Clock
50 47
51 clock-names: 48 clock-names:
52 items: 49 items:
53 - const: main 50 - const: main
54 - const: mm 51 - const: mm
55 52
56 power-domains: <<
57 maxItems: 1 <<
58 <<
59 required: 53 required:
60 - compatible 54 - compatible
61 - reg 55 - reg
>> 56 - "#pwm-cells"
62 - clocks 57 - clocks
63 - clock-names 58 - clock-names
64 59
65 additionalProperties: false 60 additionalProperties: false
66 61
67 examples: 62 examples:
68 - | 63 - |
69 #include <dt-bindings/interrupt-controller 64 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 #include <dt-bindings/clock/mt8173-clk.h> 65 #include <dt-bindings/clock/mt8173-clk.h>
71 #include <dt-bindings/interrupt-controller 66 #include <dt-bindings/interrupt-controller/irq.h>
72 67
73 pwm0: pwm@1401e000 { 68 pwm0: pwm@1401e000 {
74 compatible = "mediatek,mt8173-disp-pwm 69 compatible = "mediatek,mt8173-disp-pwm";
75 reg = <0x1401e000 0x1000>; 70 reg = <0x1401e000 0x1000>;
76 #pwm-cells = <2>; 71 #pwm-cells = <2>;
77 clocks = <&mmsys CLK_MM_DISP_PWM026M>, 72 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
78 <&mmsys CLK_MM_DISP_PWM0MM>; 73 <&mmsys CLK_MM_DISP_PWM0MM>;
79 clock-names = "main", "mm"; 74 clock-names = "main", "mm";
80 }; 75 };
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