1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas 4 $id: http://devicetree.org/schemas/pwm/renesas,tpu-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Renesas R-Car Timer Pulse Unit PWM Cont 7 title: Renesas R-Car Timer Pulse Unit PWM Controller
8 8
9 maintainers: 9 maintainers:
10 - Laurent Pinchart <laurent.pinchart+renesas@ 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 11
12 select: 12 select:
13 properties: 13 properties:
14 compatible: 14 compatible:
15 contains: 15 contains:
16 const: renesas,tpu 16 const: renesas,tpu
17 required: 17 required:
18 - compatible 18 - compatible
19 - '#pwm-cells' 19 - '#pwm-cells'
20 20
21 properties: 21 properties:
22 compatible: 22 compatible:
23 items: 23 items:
24 - enum: 24 - enum:
25 - renesas,tpu-r8a73a4 # R-Mobile A 25 - renesas,tpu-r8a73a4 # R-Mobile APE6
26 - renesas,tpu-r8a7740 # R-Mobile A 26 - renesas,tpu-r8a7740 # R-Mobile A1
27 - renesas,tpu-r8a7742 # RZ/G1H 27 - renesas,tpu-r8a7742 # RZ/G1H
28 - renesas,tpu-r8a7743 # RZ/G1M 28 - renesas,tpu-r8a7743 # RZ/G1M
29 - renesas,tpu-r8a7744 # RZ/G1N 29 - renesas,tpu-r8a7744 # RZ/G1N
30 - renesas,tpu-r8a7745 # RZ/G1E 30 - renesas,tpu-r8a7745 # RZ/G1E
31 - renesas,tpu-r8a7790 # R-Car H2 31 - renesas,tpu-r8a7790 # R-Car H2
32 - renesas,tpu-r8a7791 # R-Car M2-W 32 - renesas,tpu-r8a7791 # R-Car M2-W
33 - renesas,tpu-r8a7792 # R-Car V2H 33 - renesas,tpu-r8a7792 # R-Car V2H
34 - renesas,tpu-r8a7793 # R-Car M2-N 34 - renesas,tpu-r8a7793 # R-Car M2-N
35 - renesas,tpu-r8a7794 # R-Car E2 35 - renesas,tpu-r8a7794 # R-Car E2
36 - renesas,tpu-r8a7795 # R-Car H3 36 - renesas,tpu-r8a7795 # R-Car H3
37 - renesas,tpu-r8a7796 # R-Car M3-W 37 - renesas,tpu-r8a7796 # R-Car M3-W
38 - renesas,tpu-r8a77961 # R-Car M3-W <<
39 - renesas,tpu-r8a77965 # R-Car M3-N 38 - renesas,tpu-r8a77965 # R-Car M3-N
40 - renesas,tpu-r8a77970 # R-Car V3M 39 - renesas,tpu-r8a77970 # R-Car V3M
41 - renesas,tpu-r8a77980 # R-Car V3H 40 - renesas,tpu-r8a77980 # R-Car V3H
42 - renesas,tpu-r8a779a0 # R-Car V3U <<
43 - renesas,tpu-r8a779g0 # R-Car V4H <<
44 - renesas,tpu-r8a779h0 # R-Car V4M <<
45 - const: renesas,tpu 41 - const: renesas,tpu
46 42
47 reg: 43 reg:
48 # Base address and length of each memory r 44 # Base address and length of each memory resource used by the PWM
49 # controller hardware module. 45 # controller hardware module.
50 maxItems: 1 46 maxItems: 1
51 47
52 interrupts: 48 interrupts:
53 maxItems: 1 49 maxItems: 1
54 50
55 '#pwm-cells': 51 '#pwm-cells':
56 # should be 3. See pwm.yaml in this direct 52 # should be 3. See pwm.yaml in this directory for a description of
57 # the cells format. The only third cell fl 53 # the cells format. The only third cell flag supported by this binding is
58 # PWM_POLARITY_INVERTED. 54 # PWM_POLARITY_INVERTED.
59 const: 3 55 const: 3
60 56
61 clocks: 57 clocks:
62 maxItems: 1 58 maxItems: 1
63 59
64 power-domains: 60 power-domains:
65 maxItems: 1 61 maxItems: 1
66 62
67 resets: 63 resets:
68 maxItems: 1 64 maxItems: 1
69 65
70 required: 66 required:
71 - compatible 67 - compatible
72 - reg 68 - reg
>> 69 - '#pwm-cells'
73 - clocks 70 - clocks
74 - power-domains 71 - power-domains
75 72
76 allOf: 73 allOf:
77 - $ref: pwm.yaml# 74 - $ref: pwm.yaml#
78 75
79 - if: 76 - if:
80 not: 77 not:
81 properties: 78 properties:
82 compatible: 79 compatible:
83 contains: 80 contains:
84 enum: 81 enum:
85 - renesas,tpu-r8a73a4 82 - renesas,tpu-r8a73a4
86 - renesas,tpu-r8a7740 83 - renesas,tpu-r8a7740
87 then: 84 then:
88 required: 85 required:
89 - resets 86 - resets
90 87
91 additionalProperties: false 88 additionalProperties: false
92 89
93 examples: 90 examples:
94 - | 91 - |
95 #include <dt-bindings/clock/r8a7740-clock. 92 #include <dt-bindings/clock/r8a7740-clock.h>
96 93
97 tpu: pwm@e6600000 { 94 tpu: pwm@e6600000 {
98 compatible = "renesas,tpu-r8a7740", "r 95 compatible = "renesas,tpu-r8a7740", "renesas,tpu";
99 reg = <0xe6600000 0x148>; 96 reg = <0xe6600000 0x148>;
100 clocks = <&mstp3_clks R8A7740_CLK_TPU0 97 clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
101 power-domains = <&pd_a3sp>; 98 power-domains = <&pd_a3sp>;
102 #pwm-cells = <3>; 99 #pwm-cells = <3>;
103 }; 100 };
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