1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ 4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: NXP i.MX Co-Processor 7 title: NXP i.MX Co-Processor 8 8 9 description: 9 description: 10 This binding provides support for ARM Cortex 10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. 11 11 12 maintainers: 12 maintainers: 13 - Peng Fan <peng.fan@nxp.com> 13 - Peng Fan <peng.fan@nxp.com> 14 14 15 properties: 15 properties: 16 compatible: 16 compatible: 17 enum: 17 enum: 18 - fsl,imx6sx-cm4 18 - fsl,imx6sx-cm4 19 - fsl,imx7d-cm4 19 - fsl,imx7d-cm4 20 - fsl,imx7ulp-cm4 20 - fsl,imx7ulp-cm4 21 - fsl,imx8mm-cm4 21 - fsl,imx8mm-cm4 22 - fsl,imx8mn-cm7 22 - fsl,imx8mn-cm7 23 - fsl,imx8mn-cm7-mmio 23 - fsl,imx8mn-cm7-mmio 24 - fsl,imx8mp-cm7 24 - fsl,imx8mp-cm7 25 - fsl,imx8mp-cm7-mmio 25 - fsl,imx8mp-cm7-mmio 26 - fsl,imx8mq-cm4 26 - fsl,imx8mq-cm4 27 - fsl,imx8qm-cm4 27 - fsl,imx8qm-cm4 28 - fsl,imx8qxp-cm4 28 - fsl,imx8qxp-cm4 29 - fsl,imx8ulp-cm33 29 - fsl,imx8ulp-cm33 30 - fsl,imx93-cm33 30 - fsl,imx93-cm33 31 31 32 clocks: 32 clocks: 33 maxItems: 1 33 maxItems: 1 34 34 35 syscon: 35 syscon: 36 $ref: /schemas/types.yaml#/definitions/pha 36 $ref: /schemas/types.yaml#/definitions/phandle 37 description: 37 description: 38 Phandle to syscon block which provide ac 38 Phandle to syscon block which provide access to System Reset Controller 39 39 40 mbox-names: 40 mbox-names: 41 items: 41 items: 42 - const: tx 42 - const: tx 43 - const: rx 43 - const: rx 44 - const: rxdb 44 - const: rxdb 45 45 46 mboxes: 46 mboxes: 47 description: 47 description: 48 This property is required only if the rp 48 This property is required only if the rpmsg/virtio functionality is used. 49 List of <&phandle type channel> - 1 chan 49 List of <&phandle type channel> - 1 channel for TX, 1 channel for RX, 1 channel for RXDB. 50 (see mailbox/fsl,mu.yaml) 50 (see mailbox/fsl,mu.yaml) 51 minItems: 1 51 minItems: 1 52 maxItems: 3 52 maxItems: 3 53 53 54 memory-region: 54 memory-region: 55 description: 55 description: 56 If present, a phandle for a reserved mem 56 If present, a phandle for a reserved memory area that used for vdev buffer, 57 resource table, vring region and others 57 resource table, vring region and others used by remote processor. 58 minItems: 1 58 minItems: 1 59 maxItems: 32 59 maxItems: 32 60 60 61 power-domains: 61 power-domains: 62 minItems: 2 << 63 maxItems: 8 62 maxItems: 8 64 63 65 fsl,auto-boot: 64 fsl,auto-boot: 66 $ref: /schemas/types.yaml#/definitions/fla 65 $ref: /schemas/types.yaml#/definitions/flag 67 description: 66 description: 68 Indicate whether need to load the defaul 67 Indicate whether need to load the default firmware and start the remote 69 processor automatically. 68 processor automatically. 70 69 71 fsl,entry-address: 70 fsl,entry-address: 72 $ref: /schemas/types.yaml#/definitions/uin 71 $ref: /schemas/types.yaml#/definitions/uint32 73 description: 72 description: 74 Specify CPU entry address for SCU enable 73 Specify CPU entry address for SCU enabled processor. 75 74 76 fsl,iomuxc-gpr: 75 fsl,iomuxc-gpr: 77 $ref: /schemas/types.yaml#/definitions/pha 76 $ref: /schemas/types.yaml#/definitions/phandle 78 description: 77 description: 79 Phandle to IOMUXC GPR block which provid 78 Phandle to IOMUXC GPR block which provide access to CM7 CPUWAIT bit. 80 79 81 fsl,resource-id: 80 fsl,resource-id: 82 $ref: /schemas/types.yaml#/definitions/uin 81 $ref: /schemas/types.yaml#/definitions/uint32 83 description: 82 description: 84 This property is to specify the resource 83 This property is to specify the resource id of the remote processor in SoC 85 which supports SCFW 84 which supports SCFW 86 85 87 required: 86 required: 88 - compatible 87 - compatible 89 88 90 allOf: 89 allOf: 91 - if: 90 - if: 92 properties: 91 properties: 93 compatible: 92 compatible: 94 not: 93 not: 95 contains: 94 contains: 96 enum: 95 enum: 97 - fsl,imx8mn-cm7-mmio 96 - fsl,imx8mn-cm7-mmio 98 - fsl,imx8mp-cm7-mmio 97 - fsl,imx8mp-cm7-mmio 99 then: 98 then: 100 properties: 99 properties: 101 fsl,iomuxc-gpr: false 100 fsl,iomuxc-gpr: false 102 << 103 - if: << 104 properties: << 105 compatible: << 106 contains: << 107 enum: << 108 - fsl,imx8qxp-cm4 << 109 - fsl,imx8qm-cm4 << 110 then: << 111 required: << 112 - power-domains << 113 else: << 114 properties: << 115 power-domains: false << 116 101 117 additionalProperties: false 102 additionalProperties: false 118 103 119 examples: 104 examples: 120 - | 105 - | 121 #include <dt-bindings/clock/imx7d-clock.h> 106 #include <dt-bindings/clock/imx7d-clock.h> 122 m4_reserved_sysmem1: cm4@80000000 { 107 m4_reserved_sysmem1: cm4@80000000 { 123 reg = <0x80000000 0x80000>; 108 reg = <0x80000000 0x80000>; 124 }; 109 }; 125 110 126 m4_reserved_sysmem2: cm4@81000000 { 111 m4_reserved_sysmem2: cm4@81000000 { 127 reg = <0x81000000 0x80000>; 112 reg = <0x81000000 0x80000>; 128 }; 113 }; 129 114 130 imx7d-cm4 { 115 imx7d-cm4 { 131 compatible = "fsl,imx7d-cm4"; 116 compatible = "fsl,imx7d-cm4"; 132 memory-region = <&m4_reserved_sysmem1>, 117 memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>; 133 syscon = <&src>; 118 syscon = <&src>; 134 clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>; 119 clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>; 135 }; 120 }; 136 121 137 - | 122 - | 138 #include <dt-bindings/clock/imx8mm-clock.h 123 #include <dt-bindings/clock/imx8mm-clock.h> 139 124 140 imx8mm-cm4 { 125 imx8mm-cm4 { 141 compatible = "fsl,imx8mm-cm4"; 126 compatible = "fsl,imx8mm-cm4"; 142 clocks = <&clk IMX8MM_CLK_M4_DIV>; 127 clocks = <&clk IMX8MM_CLK_M4_DIV>; 143 mbox-names = "tx", "rx", "rxdb"; 128 mbox-names = "tx", "rx", "rxdb"; 144 mboxes = <&mu 0 1 129 mboxes = <&mu 0 1 145 &mu 1 1 130 &mu 1 1 146 &mu 3 1>; 131 &mu 3 1>; 147 memory-region = <&vdev0buffer>, <&vdev0v 132 memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>; 148 syscon = <&src>; 133 syscon = <&src>; 149 }; 134 }; 150 ... 135 ...
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