1 STMicroelectronics Co-Processor Bindings 1 STMicroelectronics Co-Processor Bindings
2 ---------------------------------------- 2 ----------------------------------------
3 3
4 This binding provides support for adjunct proc 4 This binding provides support for adjunct processors found on ST SoCs.
5 5
6 Co-processors can be controlled from the bootl 6 Co-processors can be controlled from the bootloader or the primary OS. If
7 the bootloader starts a co-processor, the prim 7 the bootloader starts a co-processor, the primary OS must detect its state
8 and act accordingly. 8 and act accordingly.
9 9
10 Required properties: 10 Required properties:
11 - compatible Should be one of: 11 - compatible Should be one of:
12 "st,st231-rpro 12 "st,st231-rproc"
13 "st,st40-rproc 13 "st,st40-rproc"
14 - memory-region Reserved memory (See: 14 - memory-region Reserved memory (See: ../reserved-memory/reserved-memory.txt)
15 - resets Reset lines (See: ../r 15 - resets Reset lines (See: ../reset/reset.txt)
16 - reset-names Must be "sw_reset" and 16 - reset-names Must be "sw_reset" and "pwr_reset"
17 - clocks Clock for co-processor 17 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
18 - clock-frequency Clock frequency to set 18 - clock-frequency Clock frequency to set co-processor at if the bootloader
19 hasn't already done so 19 hasn't already done so
20 - st,syscfg System configuration r 20 - st,syscfg System configuration register which holds the boot vector
21 for the co-processor 21 for the co-processor
22 1st cell: Phan 22 1st cell: Phandle to syscon block
23 2nd cell: Boot 23 2nd cell: Boot vector register offset
24 24
25 Example: 25 Example:
26 26
27 audio_reserved: rproc@42000000 { 27 audio_reserved: rproc@42000000 {
28 compatible = "shared-dma-pool" 28 compatible = "shared-dma-pool";
29 reg = <0x42000000 0x01000000>; 29 reg = <0x42000000 0x01000000>;
30 no-map; 30 no-map;
31 }; 31 };
32 32
33 st231-audio { 33 st231-audio {
34 compatible = "st,st231-rp 34 compatible = "st,st231-rproc";
35 memory-region = <&audio_rese 35 memory-region = <&audio_reserved>;
36 resets = <&softreset 36 resets = <&softreset STIH407_ST231_AUD_SOFTRESET>;
37 reset-names = "sw_reset"; 37 reset-names = "sw_reset";
38 clocks = <&clk_s_c0_f 38 clocks = <&clk_s_c0_flexgen CLK_ST231_AUD_0>;
39 clock-frequency = <600000000>; 39 clock-frequency = <600000000>;
40 st,syscfg = <&syscfg_cor 40 st,syscfg = <&syscfg_core 0x228>;
41 }; 41 };
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