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Linux/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml

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Diff markup

Differences between /Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml (Version linux-6.3.13)


  1 # SPDX-License-Identifier: (GPL-2.0-only OR BS      1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
  2 %YAML 1.2                                           2 %YAML 1.2
  3 ---                                                 3 ---
  4 $id: http://devicetree.org/schemas/reset/snps,      4 $id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml#
  5 $schema: http://devicetree.org/meta-schemas/co      5 $schema: http://devicetree.org/meta-schemas/core.yaml#
  6                                                     6 
  7 title: AXS10x reset controller                      7 title: AXS10x reset controller
  8                                                     8 
  9 maintainers:                                        9 maintainers:
 10   - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.c     10   - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
 11                                                    11 
 12 description: |                                     12 description: |
 13   This binding describes the ARC AXS10x boards     13   This binding describes the ARC AXS10x boards custom IP-block which allows
 14   to control reset signals of selected periphe     14   to control reset signals of selected peripherals. For example DW GMAC, etc...
 15   This block is controlled via memory-mapped r     15   This block is controlled via memory-mapped register (AKA CREG) which
 16   represents up-to 32 reset lines.                 16   represents up-to 32 reset lines.
 17   As of today only the following lines are use     17   As of today only the following lines are used:
 18    - DW GMAC - line 5                              18    - DW GMAC - line 5
 19                                                    19 
 20 properties:                                        20 properties:
 21   compatible:                                      21   compatible:
 22     const: snps,axs10x-reset                       22     const: snps,axs10x-reset
 23                                                    23 
 24   reg:                                             24   reg:
 25     maxItems: 1                                    25     maxItems: 1
 26                                                    26 
 27   '#reset-cells':                                  27   '#reset-cells':
 28     const: 1                                       28     const: 1
 29                                                    29 
 30 required:                                          30 required:
 31   - compatible                                     31   - compatible
 32   - reg                                            32   - reg
 33   - '#reset-cells'                                 33   - '#reset-cells'
 34                                                    34 
 35 additionalProperties: false                        35 additionalProperties: false
 36                                                    36 
 37 examples:                                          37 examples:
 38   - |                                              38   - |
 39     reset: reset-controller@11220 {                39     reset: reset-controller@11220 {
 40         compatible = "snps,axs10x-reset";          40         compatible = "snps,axs10x-reset";
 41         #reset-cells = <1>;                        41         #reset-cells = <1>;
 42         reg = <0x11220 0x4>;                       42         reg = <0x11220 0x4>;
 43     };                                             43     };
 44                                                    44 
 45     // Specifying reset lines connected to IP      45     // Specifying reset lines connected to IP modules:
 46     ethernet {                                     46     ethernet {
 47         resets = <&reset 5>;                       47         resets = <&reset 5>;
 48     };                                             48     };
                                                      

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