1 TI SysCon Reset Controller
2 =======================
3
4 Almost all SoCs have hardware modules that req
5 to clock and power control for their functiona
6 typically provided by means of memory-mapped I
7 sometimes a part of a larger register space re
8 functionalities. This register range is best r
9 allow multiple entities to access their releva
10 register space.
11
12 A SysCon Reset Controller node defines a devic
13 and provides reset management functionality fo
14 present on the SoC.
15
16 SysCon Reset Controller Node
17 ============================
18 Each of the reset provider/controller nodes sh
19 node and have the following properties.
20
21 Required properties:
22 --------------------
23 - compatible : Should be,
24 "ti,k2e-pscrst"
25 "ti,k2l-pscrst"
26 "ti,k2hk-pscrst"
27 "ti,syscon-reset"
28 - #reset-cells : Should be 1. Please
29 for usage details
30 - ti,reset-bits : Contains the reset c
31 Should contain 7 cel
32 consumers, defined a
33 Cell #1 : offset o
34 register
35 Cell #2 : bit posi
36 assert c
37 Cell #3 : offset o
38 register
39 Cell #4 : bit posi
40 deassert
41 Cell #5 : offset o
42 from the
43 Cell #6 : bit posi
44 reset st
45 Cell #7 : Flags us
46 availabl
47 file <dt
48
49 SysCon Reset Consumer Nodes
50 ===========================
51 Each of the reset consumer nodes should have t
52 in addition to their own properties.
53
54 Required properties:
55 --------------------
56 - resets : A phandle to the reset contr
57 to a reset specifier as defi
58
59 Please also refer to Documentation/devicetree/
60 common reset controller usage by consumers.
61
62 Example:
63 --------
64 The following example demonstrates a syscon no
65 using the syscon node, and a consumer (a DSP d
66 66AK2E SoC.
67
68 / {
69 soc {
70 psc: power-sleep-controller@23
71 compatible = "syscon",
72 reg = <0x02350000 0x10
73
74 pscrst: reset-controll
75 compatible = "
76 #reset-cells =
77
78 ti,reset-bits
79 0xa3c
80 0xa40
81 >;
82 };
83 };
84
85 dsp0: dsp0 {
86 ...
87 resets = <&pscrst 0>;
88 ...
89 };
90 };
91 };
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