1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/rtc/brcm,br 4 $id: http://devicetree.org/schemas/rtc/brcm,brcmstb-waketimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Broadcom STB wake-up Timer 7 title: Broadcom STB wake-up Timer
8 8
9 maintainers: 9 maintainers:
10 - Florian Fainelli <f.fainelli@gmail.com> 10 - Florian Fainelli <f.fainelli@gmail.com>
11 11
12 description: 12 description:
13 The Broadcom STB wake-up timer provides a 27 13 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
14 ability to wake up the system from low-power !! 14 ability to wake up the system from low-power suspend/standby modes.
15 optionally generate RTC alarm interrupts. <<
16 15
17 allOf: 16 allOf:
18 - $ref: rtc.yaml# !! 17 - $ref: "rtc.yaml#"
19 18
20 properties: 19 properties:
21 compatible: 20 compatible:
22 const: brcm,brcmstb-waketimer 21 const: brcm,brcmstb-waketimer
23 22
24 reg: 23 reg:
25 maxItems: 1 24 maxItems: 1
26 25
27 interrupts: 26 interrupts:
28 minItems: 1 !! 27 description: the TIMER interrupt
29 items: !! 28 maxItems: 1
30 - description: the TIMER interrupt <<
31 - description: the ALARM interrupt <<
32 description: <<
33 The TIMER interrupt wakes the system fro <<
34 An ALARM interrupt may be specified to i <<
35 is enabled. <<
36 29
37 clocks: 30 clocks:
38 description: clock reference in the 27MHz 31 description: clock reference in the 27MHz domain
39 maxItems: 1 32 maxItems: 1
40 33
41 additionalProperties: false 34 additionalProperties: false
42 35
43 examples: 36 examples:
44 - | 37 - |
45 rtc@f041a080 { !! 38 rtc@f0411580 {
46 compatible = "brcm,brcmstb-waketimer"; 39 compatible = "brcm,brcmstb-waketimer";
47 reg = <0xf041a080 0x14>; !! 40 reg = <0xf0411580 0x14>;
48 interrupts-extended = <&aon_pm_l2_intc !! 41 interrupts = <0x3>;
49 <&upg_aux_aon_in !! 42 interrupt-parent = <&aon_pm_l2_intc>;
50 clocks = <&upg_fixed>; 43 clocks = <&upg_fixed>;
51 }; 44 };
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