1 # Copyright 2020 Lubomir Rintel <lkundrak@v3.sk 1 # Copyright 2020 Lubomir Rintel <lkundrak@v3.sk>
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/serial/8250 4 $id: http://devicetree.org/schemas/serial/8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: UART (Universal Asynchronous Receiver/T !! 7 title: UART (Universal Asynchronous Receiver/Transmitter) bindings
8 8
9 maintainers: 9 maintainers:
10 - devicetree@vger.kernel.org 10 - devicetree@vger.kernel.org
11 11
12 allOf: 12 allOf:
13 - $ref: serial.yaml# 13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-perip <<
15 - if: 14 - if:
16 anyOf: 15 anyOf:
17 - required: 16 - required:
18 - aspeed,lpc-io-reg 17 - aspeed,lpc-io-reg
19 - required: 18 - required:
20 - aspeed,lpc-interrupts 19 - aspeed,lpc-interrupts
21 - required: 20 - required:
22 - aspeed,sirq-polarity-sense 21 - aspeed,sirq-polarity-sense
23 then: 22 then:
24 properties: 23 properties:
25 compatible: 24 compatible:
26 const: aspeed,ast2500-vuart 25 const: aspeed,ast2500-vuart
27 - if: 26 - if:
28 properties: 27 properties:
29 compatible: 28 compatible:
30 const: mrvl,mmp-uart 29 const: mrvl,mmp-uart
31 then: 30 then:
32 properties: 31 properties:
33 reg-shift: 32 reg-shift:
34 const: 2 33 const: 2
35 required: 34 required:
36 - reg-shift 35 - reg-shift
37 - if: 36 - if:
38 not: 37 not:
39 properties: 38 properties:
40 compatible: 39 compatible:
41 items: 40 items:
42 - enum: 41 - enum:
43 - ns8250 42 - ns8250
44 - ns16450 43 - ns16450
45 - ns16550 44 - ns16550
46 - ns16550a 45 - ns16550a
47 then: 46 then:
48 anyOf: 47 anyOf:
49 - required: [ clock-frequency ] 48 - required: [ clock-frequency ]
50 - required: [ clocks ] 49 - required: [ clocks ]
51 50
52 properties: 51 properties:
53 compatible: 52 compatible:
54 oneOf: 53 oneOf:
55 - const: ns8250 54 - const: ns8250
56 - const: ns16450 55 - const: ns16450
57 - const: ns16550 56 - const: ns16550
58 - const: ns16550a 57 - const: ns16550a
59 - const: ns16850 58 - const: ns16850
60 - const: aspeed,ast2400-vuart 59 - const: aspeed,ast2400-vuart
61 - const: aspeed,ast2500-vuart 60 - const: aspeed,ast2500-vuart
62 - const: intel,xscale-uart 61 - const: intel,xscale-uart
63 - const: mrvl,pxa-uart 62 - const: mrvl,pxa-uart
64 - const: nuvoton,wpcm450-uart 63 - const: nuvoton,wpcm450-uart
65 - const: nuvoton,npcm750-uart 64 - const: nuvoton,npcm750-uart
66 - const: nvidia,tegra20-uart 65 - const: nvidia,tegra20-uart
67 - const: nxp,lpc3220-uart 66 - const: nxp,lpc3220-uart
68 - items: 67 - items:
69 - enum: 68 - enum:
70 - exar,xr16l2552 69 - exar,xr16l2552
71 - exar,xr16l2551 70 - exar,xr16l2551
72 - exar,xr16l2550 71 - exar,xr16l2550
73 - const: ns8250 72 - const: ns8250
74 - items: 73 - items:
75 - enum: 74 - enum:
76 - altr,16550-FIFO32 75 - altr,16550-FIFO32
77 - altr,16550-FIFO64 76 - altr,16550-FIFO64
78 - altr,16550-FIFO128 77 - altr,16550-FIFO128
79 - fsl,16550-FIFO64 78 - fsl,16550-FIFO64
80 - fsl,ns16550 79 - fsl,ns16550
81 - andestech,uart16550 80 - andestech,uart16550
82 - nxp,lpc1850-uart 81 - nxp,lpc1850-uart
83 - opencores,uart16550-rtlsvn105 82 - opencores,uart16550-rtlsvn105
84 - ti,da830-uart 83 - ti,da830-uart
85 - const: ns16550a 84 - const: ns16550a
86 - items: 85 - items:
87 - enum: 86 - enum:
88 - ns16750 87 - ns16750
89 - cavium,octeon-3860-uart 88 - cavium,octeon-3860-uart
90 - xlnx,xps-uart16550-2.00.b 89 - xlnx,xps-uart16550-2.00.b
91 - ralink,rt2880-uart 90 - ralink,rt2880-uart
92 - enum: 91 - enum:
93 - ns16550 # Deprecated, unless t 92 - ns16550 # Deprecated, unless the FIFO really is broken
94 - ns16550a 93 - ns16550a
95 - items: 94 - items:
96 - enum: 95 - enum:
97 - nuvoton,npcm845-uart <<
98 - const: nuvoton,npcm750-uart <<
99 - items: <<
100 - enum: <<
101 - ralink,mt7620a-uart 96 - ralink,mt7620a-uart
102 - ralink,rt3052-uart 97 - ralink,rt3052-uart
103 - ralink,rt3883-uart 98 - ralink,rt3883-uart
104 - const: ralink,rt2880-uart 99 - const: ralink,rt2880-uart
105 - enum: 100 - enum:
106 - ns16550 # Deprecated, unless t 101 - ns16550 # Deprecated, unless the FIFO really is broken
107 - ns16550a 102 - ns16550a
108 - items: 103 - items:
109 - enum: 104 - enum:
110 - mediatek,mt7622-btif 105 - mediatek,mt7622-btif
111 - mediatek,mt7623-btif 106 - mediatek,mt7623-btif
112 - const: mediatek,mtk-btif 107 - const: mediatek,mtk-btif
113 - items: 108 - items:
114 - const: mrvl,mmp-uart 109 - const: mrvl,mmp-uart
115 - const: intel,xscale-uart 110 - const: intel,xscale-uart
116 - items: 111 - items:
117 - enum: 112 - enum:
118 - nvidia,tegra30-uart 113 - nvidia,tegra30-uart
119 - nvidia,tegra114-uart 114 - nvidia,tegra114-uart
120 - nvidia,tegra124-uart 115 - nvidia,tegra124-uart
121 - nvidia,tegra210-uart <<
122 - nvidia,tegra186-uart 116 - nvidia,tegra186-uart
123 - nvidia,tegra194-uart 117 - nvidia,tegra194-uart
124 - nvidia,tegra234-uart !! 118 - nvidia,tegra210-uart
125 - const: nvidia,tegra20-uart 119 - const: nvidia,tegra20-uart
126 120
127 reg: 121 reg:
128 maxItems: 1 122 maxItems: 1
129 123
130 interrupts: 124 interrupts:
131 maxItems: 1 125 maxItems: 1
132 126
133 clock-frequency: true 127 clock-frequency: true
134 128
135 clocks: 129 clocks:
136 maxItems: 1 130 maxItems: 1
137 131
138 resets: 132 resets:
139 maxItems: 1 133 maxItems: 1
140 134
141 current-speed: 135 current-speed:
142 $ref: /schemas/types.yaml#/definitions/uin 136 $ref: /schemas/types.yaml#/definitions/uint32
143 description: The current active speed of t 137 description: The current active speed of the UART.
144 138
145 reg-offset: 139 reg-offset:
146 $ref: /schemas/types.yaml#/definitions/uin <<
147 description: | 140 description: |
148 Offset to apply to the mapbase from the 141 Offset to apply to the mapbase from the start of the registers.
149 142
150 reg-shift: 143 reg-shift:
151 description: Quantity to shift the registe 144 description: Quantity to shift the register offsets by.
152 145
153 reg-io-width: 146 reg-io-width:
154 description: | 147 description: |
155 The size (in bytes) of the IO accesses t 148 The size (in bytes) of the IO accesses that should be performed on the
156 device. There are some systems that requ 149 device. There are some systems that require 32-bit accesses to the
157 UART (e.g. TI davinci). 150 UART (e.g. TI davinci).
158 151
159 used-by-rtas: 152 used-by-rtas:
160 type: boolean 153 type: boolean
161 description: | 154 description: |
162 Set to indicate that the port is in use 155 Set to indicate that the port is in use by the OpenFirmware RTAS and
163 should not be registered. 156 should not be registered.
164 157
165 no-loopback-test: 158 no-loopback-test:
166 type: boolean 159 type: boolean
167 description: | 160 description: |
168 Set to indicate that the port does not i 161 Set to indicate that the port does not implement loopback test mode.
169 162
170 fifo-size: 163 fifo-size:
171 $ref: /schemas/types.yaml#/definitions/uin 164 $ref: /schemas/types.yaml#/definitions/uint32
172 description: The fifo size of the UART. 165 description: The fifo size of the UART.
173 166
174 auto-flow-control: 167 auto-flow-control:
175 type: boolean 168 type: boolean
176 description: | 169 description: |
177 One way to enable automatic flow control 170 One way to enable automatic flow control support. The driver is
178 allowed to detect support for the capabi 171 allowed to detect support for the capability even without this
179 property. 172 property.
180 173
181 tx-threshold: 174 tx-threshold:
182 description: | 175 description: |
183 Specify the TX FIFO low water indication 176 Specify the TX FIFO low water indication for parts with programmable
184 TX FIFO thresholds. 177 TX FIFO thresholds.
185 178
186 overrun-throttle-ms: 179 overrun-throttle-ms:
187 description: | 180 description: |
188 How long to pause uart rx when input ove 181 How long to pause uart rx when input overrun is encountered.
189 182
190 rts-gpios: true 183 rts-gpios: true
191 cts-gpios: true 184 cts-gpios: true
192 dtr-gpios: true 185 dtr-gpios: true
193 dsr-gpios: true 186 dsr-gpios: true
194 rng-gpios: true 187 rng-gpios: true
195 dcd-gpios: true 188 dcd-gpios: true
196 189
197 aspeed,sirq-polarity-sense: 190 aspeed,sirq-polarity-sense:
198 $ref: /schemas/types.yaml#/definitions/pha 191 $ref: /schemas/types.yaml#/definitions/phandle-array
199 description: | 192 description: |
200 Phandle to aspeed,ast2500-scu compatible 193 Phandle to aspeed,ast2500-scu compatible syscon alongside register
201 offset and bit number to identify how th 194 offset and bit number to identify how the SIRQ polarity should be
202 configured. One possible data source is 195 configured. One possible data source is the LPC/eSPI mode bit. Only
203 applicable to aspeed,ast2500-vuart. 196 applicable to aspeed,ast2500-vuart.
204 deprecated: true 197 deprecated: true
205 198
206 aspeed,lpc-io-reg: 199 aspeed,lpc-io-reg:
207 $ref: /schemas/types.yaml#/definitions/uin !! 200 $ref: '/schemas/types.yaml#/definitions/uint32'
208 maxItems: 1 <<
209 description: | 201 description: |
210 The VUART LPC address. Only applicable 202 The VUART LPC address. Only applicable to aspeed,ast2500-vuart.
211 203
212 aspeed,lpc-interrupts: 204 aspeed,lpc-interrupts:
213 $ref: /schemas/types.yaml#/definitions/uin !! 205 $ref: "/schemas/types.yaml#/definitions/uint32-array"
214 minItems: 2 206 minItems: 2
215 maxItems: 2 207 maxItems: 2
216 description: | 208 description: |
217 A 2-cell property describing the VUART S 209 A 2-cell property describing the VUART SIRQ number and SIRQ
218 polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE 210 polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only
219 applicable to aspeed,ast2500-vuart. 211 applicable to aspeed,ast2500-vuart.
220 212
221 required: 213 required:
222 - reg 214 - reg
223 - interrupts 215 - interrupts
224 216
225 unevaluatedProperties: false 217 unevaluatedProperties: false
226 218
227 examples: 219 examples:
228 - | 220 - |
229 serial@80230000 { 221 serial@80230000 {
230 compatible = "ns8250"; 222 compatible = "ns8250";
231 reg = <0x80230000 0x100>; 223 reg = <0x80230000 0x100>;
232 interrupts = <10>; 224 interrupts = <10>;
233 reg-shift = <2>; 225 reg-shift = <2>;
234 clock-frequency = <48000000>; 226 clock-frequency = <48000000>;
235 }; 227 };
236 - | 228 - |
237 #include <dt-bindings/gpio/gpio.h> 229 #include <dt-bindings/gpio/gpio.h>
238 serial@49042000 { 230 serial@49042000 {
239 compatible = "andestech,uart16550", "n 231 compatible = "andestech,uart16550", "ns16550a";
240 reg = <0x49042000 0x400>; 232 reg = <0x49042000 0x400>;
241 interrupts = <80>; 233 interrupts = <80>;
242 clock-frequency = <48000000>; 234 clock-frequency = <48000000>;
243 cts-gpios = <&gpio3 5 GPIO_ACTIVE_LOW> 235 cts-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
244 rts-gpios = <&gpio3 6 GPIO_ACTIVE_LOW> 236 rts-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
245 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW 237 dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
246 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW 238 dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
247 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW 239 dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
248 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW 240 rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
249 }; 241 };
250 - | 242 - |
251 #include <dt-bindings/clock/aspeed-clock.h 243 #include <dt-bindings/clock/aspeed-clock.h>
252 #include <dt-bindings/interrupt-controller 244 #include <dt-bindings/interrupt-controller/irq.h>
253 serial@1e787000 { 245 serial@1e787000 {
254 compatible = "aspeed,ast2500-vuart"; 246 compatible = "aspeed,ast2500-vuart";
255 reg = <0x1e787000 0x40>; 247 reg = <0x1e787000 0x40>;
256 reg-shift = <2>; 248 reg-shift = <2>;
257 interrupts = <8>; 249 interrupts = <8>;
258 clocks = <&syscon ASPEED_CLK_APB>; 250 clocks = <&syscon ASPEED_CLK_APB>;
259 no-loopback-test; 251 no-loopback-test;
260 aspeed,lpc-io-reg = <0x3f8>; 252 aspeed,lpc-io-reg = <0x3f8>;
261 aspeed,lpc-interrupts = <4 IRQ_TYPE_LE 253 aspeed,lpc-interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
262 }; 254 };
263 255
264 ... 256 ...
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