1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/serial/fsl- 4 $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale low power universal asynchron 7 title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
8 8
9 maintainers: 9 maintainers:
10 - Fugang Duan <fugang.duan@nxp.com> 10 - Fugang Duan <fugang.duan@nxp.com>
11 11
12 allOf: 12 allOf:
13 - $ref: rs485.yaml# 13 - $ref: rs485.yaml#
14 - $ref: serial.yaml# 14 - $ref: serial.yaml#
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: 18 oneOf:
19 - enum: 19 - enum:
20 - fsl,vf610-lpuart 20 - fsl,vf610-lpuart
21 - fsl,ls1021a-lpuart 21 - fsl,ls1021a-lpuart
22 - fsl,ls1028a-lpuart 22 - fsl,ls1028a-lpuart
23 - fsl,imx7ulp-lpuart 23 - fsl,imx7ulp-lpuart
24 - fsl,imx8qxp-lpuart 24 - fsl,imx8qxp-lpuart
25 - fsl,imxrt1050-lpuart 25 - fsl,imxrt1050-lpuart
26 - items: 26 - items:
27 - enum: 27 - enum:
28 - fsl,imx8ulp-lpuart <<
29 - const: fsl,imx7ulp-lpuart <<
30 - items: <<
31 - enum: <<
32 - fsl,imx93-lpuart 28 - fsl,imx93-lpuart
33 - fsl,imx95-lpuart !! 29 - fsl,imx8ulp-lpuart
34 - const: fsl,imx8ulp-lpuart <<
35 - const: fsl,imx7ulp-lpuart 30 - const: fsl,imx7ulp-lpuart
36 - items: 31 - items:
37 - enum: 32 - enum:
38 - fsl,imx8qm-lpuart 33 - fsl,imx8qm-lpuart
39 - fsl,imx8dxl-lpuart 34 - fsl,imx8dxl-lpuart
40 - const: fsl,imx8qxp-lpuart 35 - const: fsl,imx8qxp-lpuart
41 - items: 36 - items:
42 - const: fsl,imxrt1050-lpuart 37 - const: fsl,imxrt1050-lpuart
43 - const: fsl,imxrt1170-lpuart 38 - const: fsl,imxrt1170-lpuart
44 39
45 reg: 40 reg:
46 maxItems: 1 41 maxItems: 1
47 42
48 interrupts: 43 interrupts:
49 maxItems: 1 44 maxItems: 1
50 45
51 clocks: 46 clocks:
52 items: 47 items:
53 - description: ipg clock 48 - description: ipg clock
54 - description: baud clock 49 - description: baud clock
55 minItems: 1 50 minItems: 1
56 51
57 clock-names: 52 clock-names:
58 items: 53 items:
59 - const: ipg 54 - const: ipg
60 - const: baud 55 - const: baud
61 minItems: 1 56 minItems: 1
62 57
63 dmas: 58 dmas:
64 items: 59 items:
65 - description: DMA controller phandle an 60 - description: DMA controller phandle and request line for RX
66 - description: DMA controller phandle an 61 - description: DMA controller phandle and request line for TX
67 62
68 dma-names: 63 dma-names:
69 items: 64 items:
70 - const: rx 65 - const: rx
71 - const: tx 66 - const: tx
72 <<
73 power-domains: <<
74 maxItems: 1 <<
75 67
76 required: 68 required:
77 - compatible 69 - compatible
78 - reg 70 - reg
79 - interrupts 71 - interrupts
80 - clocks 72 - clocks
81 - clock-names 73 - clock-names
82 74
83 unevaluatedProperties: false 75 unevaluatedProperties: false
84 76
85 examples: 77 examples:
86 - | 78 - |
87 #include <dt-bindings/clock/vf610-clock.h> 79 #include <dt-bindings/clock/vf610-clock.h>
88 80
89 serial@40027000 { 81 serial@40027000 {
90 compatible = "fsl,vf610-lpuart"; 82 compatible = "fsl,vf610-lpuart";
91 reg = <0x40027000 0x1000>; 83 reg = <0x40027000 0x1000>;
92 interrupts = <0 61 0x00>; 84 interrupts = <0 61 0x00>;
93 clocks = <&clks VF610_CLK_UART0>; 85 clocks = <&clks VF610_CLK_UART0>;
94 clock-names = "ipg"; 86 clock-names = "ipg";
95 dmas = <&edma0 0 2>, <&edma0 0 3>; 87 dmas = <&edma0 0 2>, <&edma0 0 3>;
96 dma-names = "rx","tx"; 88 dma-names = "rx","tx";
97 }; 89 };
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