1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/serial/medi 4 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek Universal Asynchronous Receive 7 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)
8 8
9 maintainers: 9 maintainers:
10 - Matthias Brugger <matthias.bgg@gmail.com> 10 - Matthias Brugger <matthias.bgg@gmail.com>
11 11
12 allOf: 12 allOf:
13 - $ref: serial.yaml# 13 - $ref: serial.yaml#
14 14
15 description: | 15 description: |
16 The MediaTek UART is based on the basic 8250 16 The MediaTek UART is based on the basic 8250 UART and compatible
17 with 16550A, with enhancements for high spee 17 with 16550A, with enhancements for high speed baud rates and
18 support for DMA. 18 support for DMA.
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 oneOf: 22 oneOf:
23 - const: mediatek,mt6577-uart 23 - const: mediatek,mt6577-uart
24 - items: 24 - items:
25 - enum: 25 - enum:
26 - mediatek,mt2701-uart 26 - mediatek,mt2701-uart
27 - mediatek,mt2712-uart 27 - mediatek,mt2712-uart
28 - mediatek,mt6580-uart 28 - mediatek,mt6580-uart
29 - mediatek,mt6582-uart 29 - mediatek,mt6582-uart
30 - mediatek,mt6589-uart 30 - mediatek,mt6589-uart
31 - mediatek,mt6755-uart 31 - mediatek,mt6755-uart
32 - mediatek,mt6765-uart 32 - mediatek,mt6765-uart
33 - mediatek,mt6779-uart 33 - mediatek,mt6779-uart
34 - mediatek,mt6795-uart 34 - mediatek,mt6795-uart
35 - mediatek,mt6797-uart 35 - mediatek,mt6797-uart
36 - mediatek,mt7622-uart 36 - mediatek,mt7622-uart
37 - mediatek,mt7623-uart 37 - mediatek,mt7623-uart
38 - mediatek,mt7629-uart 38 - mediatek,mt7629-uart
39 - mediatek,mt7981-uart 39 - mediatek,mt7981-uart
40 - mediatek,mt7986-uart 40 - mediatek,mt7986-uart
41 - mediatek,mt7988-uart 41 - mediatek,mt7988-uart
42 - mediatek,mt8127-uart 42 - mediatek,mt8127-uart
43 - mediatek,mt8135-uart 43 - mediatek,mt8135-uart
44 - mediatek,mt8173-uart 44 - mediatek,mt8173-uart
45 - mediatek,mt8183-uart 45 - mediatek,mt8183-uart
46 - mediatek,mt8186-uart 46 - mediatek,mt8186-uart
47 - mediatek,mt8188-uart 47 - mediatek,mt8188-uart
48 - mediatek,mt8192-uart 48 - mediatek,mt8192-uart
49 - mediatek,mt8195-uart 49 - mediatek,mt8195-uart
50 - mediatek,mt8365-uart 50 - mediatek,mt8365-uart
51 - mediatek,mt8516-uart 51 - mediatek,mt8516-uart
52 - const: mediatek,mt6577-uart 52 - const: mediatek,mt6577-uart
53 53
54 reg: 54 reg:
55 description: The base address of the UART 55 description: The base address of the UART register bank
56 maxItems: 1 56 maxItems: 1
57 57
58 clocks: 58 clocks:
59 minItems: 1 59 minItems: 1
60 items: 60 items:
61 - description: The clock the baudrate is 61 - description: The clock the baudrate is derived from
62 - description: The bus clock for registe 62 - description: The bus clock for register accesses
63 63
64 clock-names: 64 clock-names:
65 minItems: 1 65 minItems: 1
66 items: 66 items:
67 - const: baud 67 - const: baud
68 - const: bus 68 - const: bus
69 69
70 dmas: 70 dmas:
71 items: 71 items:
72 - description: phandle to TX DMA 72 - description: phandle to TX DMA
73 - description: phandle to RX DMA 73 - description: phandle to RX DMA
74 74
75 dma-names: 75 dma-names:
76 items: 76 items:
77 - const: tx 77 - const: tx
78 - const: rx 78 - const: rx
79 79
80 interrupts: 80 interrupts:
81 minItems: 1 81 minItems: 1
82 maxItems: 2 82 maxItems: 2
83 83
84 interrupt-names: 84 interrupt-names:
85 description: 85 description:
86 The UART interrupt and optionally the RX 86 The UART interrupt and optionally the RX in-band wakeup interrupt.
87 minItems: 1 87 minItems: 1
88 items: 88 items:
89 - const: uart 89 - const: uart
90 - const: wakeup 90 - const: wakeup
91 91
92 pinctrl-0: true 92 pinctrl-0: true
93 pinctrl-1: true 93 pinctrl-1: true
94 94
95 pinctrl-names: 95 pinctrl-names:
96 minItems: 1 96 minItems: 1
97 items: 97 items:
98 - const: default 98 - const: default
99 - const: sleep 99 - const: sleep
100 100
101 required: 101 required:
102 - compatible 102 - compatible
103 - reg 103 - reg
104 - clocks 104 - clocks
105 - interrupts 105 - interrupts
106 106
107 unevaluatedProperties: false 107 unevaluatedProperties: false
108 108
109 examples: 109 examples:
110 - | 110 - |
111 #include <dt-bindings/interrupt-controller 111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 112
113 serial@11006000 { 113 serial@11006000 {
114 compatible = "mediatek,mt6589-uart", " 114 compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
115 reg = <0x11006000 0x400>; 115 reg = <0x11006000 0x400>;
116 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVE 116 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>,
117 <GIC_SPI 52 IRQ_TYPE_EDGE 117 <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>;
118 interrupt-names = "uart", "wakeup"; 118 interrupt-names = "uart", "wakeup";
119 clocks = <&uart_clk>, <&bus_clk>; 119 clocks = <&uart_clk>, <&bus_clk>;
120 clock-names = "baud", "bus"; 120 clock-names = "baud", "bus";
121 pinctrl-0 = <&uart_pin>; 121 pinctrl-0 = <&uart_pin>;
122 pinctrl-1 = <&uart_pin_sleep>; 122 pinctrl-1 = <&uart_pin_sleep>;
123 pinctrl-names = "default", "sleep"; 123 pinctrl-names = "default", "sleep";
124 }; 124 };
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