1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/serial/rene 4 $id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Renesas Serial Communication Interface 7 title: Renesas Serial Communication Interface with FIFO (SCIF)
8 8
9 maintainers: 9 maintainers:
10 - Geert Uytterhoeven <geert+renesas@glider.be 10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 11
>> 12 allOf:
>> 13 - $ref: serial.yaml#
>> 14
12 properties: 15 properties:
13 compatible: 16 compatible:
14 oneOf: 17 oneOf:
15 - items: 18 - items:
16 - enum: 19 - enum:
17 - renesas,scif-r7s72100 # RZ 20 - renesas,scif-r7s72100 # RZ/A1H
18 - const: renesas,scif # ge 21 - const: renesas,scif # generic SCIF compatible UART
19 22
20 - items: 23 - items:
21 - enum: 24 - enum:
22 - renesas,scif-r7s9210 # RZ 25 - renesas,scif-r7s9210 # RZ/A2
23 26
24 - items: 27 - items:
25 - enum: 28 - enum:
26 - renesas,scif-r8a7778 # R- 29 - renesas,scif-r8a7778 # R-Car M1
27 - renesas,scif-r8a7779 # R- 30 - renesas,scif-r8a7779 # R-Car H1
28 - const: renesas,rcar-gen1-scif # R- 31 - const: renesas,rcar-gen1-scif # R-Car Gen1
29 - const: renesas,scif # ge 32 - const: renesas,scif # generic SCIF compatible UART
30 33
31 - items: 34 - items:
32 - enum: 35 - enum:
33 - renesas,scif-r8a7742 # RZ 36 - renesas,scif-r8a7742 # RZ/G1H
34 - renesas,scif-r8a7743 # RZ 37 - renesas,scif-r8a7743 # RZ/G1M
35 - renesas,scif-r8a7744 # RZ 38 - renesas,scif-r8a7744 # RZ/G1N
36 - renesas,scif-r8a7745 # RZ 39 - renesas,scif-r8a7745 # RZ/G1E
37 - renesas,scif-r8a77470 # RZ 40 - renesas,scif-r8a77470 # RZ/G1C
38 - renesas,scif-r8a7790 # R- 41 - renesas,scif-r8a7790 # R-Car H2
39 - renesas,scif-r8a7791 # R- 42 - renesas,scif-r8a7791 # R-Car M2-W
40 - renesas,scif-r8a7792 # R- 43 - renesas,scif-r8a7792 # R-Car V2H
41 - renesas,scif-r8a7793 # R- 44 - renesas,scif-r8a7793 # R-Car M2-N
42 - renesas,scif-r8a7794 # R- 45 - renesas,scif-r8a7794 # R-Car E2
43 - const: renesas,rcar-gen2-scif # R- 46 - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
44 - const: renesas,scif # ge 47 - const: renesas,scif # generic SCIF compatible UART
45 48
46 - items: 49 - items:
47 - enum: 50 - enum:
48 - renesas,scif-r8a774a1 # RZ 51 - renesas,scif-r8a774a1 # RZ/G2M
49 - renesas,scif-r8a774a3 # RZ <<
50 - renesas,scif-r8a774b1 # RZ 52 - renesas,scif-r8a774b1 # RZ/G2N
51 - renesas,scif-r8a774c0 # RZ 53 - renesas,scif-r8a774c0 # RZ/G2E
52 - renesas,scif-r8a774e1 # RZ 54 - renesas,scif-r8a774e1 # RZ/G2H
53 - renesas,scif-r8a7795 # R- 55 - renesas,scif-r8a7795 # R-Car H3
54 - renesas,scif-r8a7796 # R- 56 - renesas,scif-r8a7796 # R-Car M3-W
55 - renesas,scif-r8a77961 # R- 57 - renesas,scif-r8a77961 # R-Car M3-W+
56 - renesas,scif-r8a77965 # R- 58 - renesas,scif-r8a77965 # R-Car M3-N
57 - renesas,scif-r8a77970 # R- 59 - renesas,scif-r8a77970 # R-Car V3M
58 - renesas,scif-r8a77980 # R- 60 - renesas,scif-r8a77980 # R-Car V3H
59 - renesas,scif-r8a77990 # R- 61 - renesas,scif-r8a77990 # R-Car E3
60 - renesas,scif-r8a77995 # R- 62 - renesas,scif-r8a77995 # R-Car D3
61 - const: renesas,rcar-gen3-scif # R- 63 - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
62 - const: renesas,scif # ge 64 - const: renesas,scif # generic SCIF compatible UART
63 65
64 - items: 66 - items:
65 - enum: 67 - enum:
66 - renesas,scif-r8a779a0 # R- 68 - renesas,scif-r8a779a0 # R-Car V3U
67 - renesas,scif-r8a779f0 # R- 69 - renesas,scif-r8a779f0 # R-Car S4-8
68 - renesas,scif-r8a779g0 # R- 70 - renesas,scif-r8a779g0 # R-Car V4H
69 - renesas,scif-r8a779h0 # R- <<
70 - const: renesas,rcar-gen4-scif # R- 71 - const: renesas,rcar-gen4-scif # R-Car Gen4
71 - const: renesas,scif # ge 72 - const: renesas,scif # generic SCIF compatible UART
72 73
73 - items: 74 - items:
74 - enum: 75 - enum:
75 - renesas,scif-r9a07g044 # 76 - renesas,scif-r9a07g044 # RZ/G2{L,LC}
76 77
77 - items: 78 - items:
78 - enum: 79 - enum:
79 - renesas,scif-r9a07g043 # 80 - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five
80 - renesas,scif-r9a07g054 # 81 - renesas,scif-r9a07g054 # RZ/V2L
81 - renesas,scif-r9a08g045 # <<
82 - const: renesas,scif-r9a07g044 # 82 - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
83 83
84 - const: renesas,scif-r9a09g057 # <<
85 <<
86 reg: 84 reg:
87 maxItems: 1 85 maxItems: 1
88 86
89 interrupts: 87 interrupts:
90 oneOf: 88 oneOf:
91 - items: 89 - items:
92 - description: A combined interrupt 90 - description: A combined interrupt
93 - items: 91 - items:
94 - description: Error interrupt 92 - description: Error interrupt
95 - description: Receive buffer full i 93 - description: Receive buffer full interrupt
96 - description: Transmit buffer empty 94 - description: Transmit buffer empty interrupt
97 - description: Break interrupt 95 - description: Break interrupt
>> 96 - items:
>> 97 - description: Error interrupt
>> 98 - description: Receive buffer full interrupt
>> 99 - description: Transmit buffer empty interrupt
>> 100 - description: Break interrupt
98 - description: Data Ready interrupt 101 - description: Data Ready interrupt
99 - description: Transmit End interrup 102 - description: Transmit End interrupt
100 - description: Transmit End/Data Rea <<
101 - description: Receive buffer full i <<
102 - description: Transmit buffer empty <<
103 minItems: 4 <<
104 103
105 interrupt-names: 104 interrupt-names:
106 minItems: 4 !! 105 oneOf:
107 items: !! 106 - items:
108 - const: eri !! 107 - const: eri
109 - const: rxi !! 108 - const: rxi
110 - const: txi !! 109 - const: txi
111 - const: bri !! 110 - const: bri
112 - const: dri !! 111 - items:
113 - const: tei !! 112 - const: eri
114 - const: tei-dri !! 113 - const: rxi
115 - const: rxi-edge !! 114 - const: txi
116 - const: txi-edge !! 115 - const: bri
>> 116 - const: dri
>> 117 - const: tei
117 118
118 clocks: 119 clocks:
119 minItems: 1 120 minItems: 1
120 maxItems: 4 121 maxItems: 4
121 122
122 clock-names: 123 clock-names:
123 minItems: 1 124 minItems: 1
124 maxItems: 4 125 maxItems: 4
125 items: 126 items:
126 enum: 127 enum:
127 - fck # UART functional clock 128 - fck # UART functional clock
128 - sck # optional external clock input 129 - sck # optional external clock input
129 - brg_int # optional internal clock so 130 - brg_int # optional internal clock source for BRG frequency divider
130 - scif_clk # optional external clock s 131 - scif_clk # optional external clock source for BRG frequency divider
131 132
132 power-domains: 133 power-domains:
133 maxItems: 1 134 maxItems: 1
134 135
135 resets: 136 resets:
136 maxItems: 1 137 maxItems: 1
137 138
138 dmas: 139 dmas:
139 minItems: 2 140 minItems: 2
140 maxItems: 4 141 maxItems: 4
141 description: 142 description:
142 Must contain a list of pairs of referenc 143 Must contain a list of pairs of references to DMA specifiers, one for
143 transmission, and one for reception. 144 transmission, and one for reception.
144 145
145 dma-names: 146 dma-names:
146 minItems: 2 147 minItems: 2
147 maxItems: 4 148 maxItems: 4
148 items: 149 items:
149 enum: 150 enum:
150 - tx 151 - tx
151 - rx 152 - rx
152 153
153 required: 154 required:
154 - compatible 155 - compatible
155 - reg 156 - reg
156 - interrupts 157 - interrupts
157 - clocks 158 - clocks
158 - clock-names 159 - clock-names
159 - power-domains 160 - power-domains
160 161
161 allOf: !! 162 if:
162 - $ref: serial.yaml# !! 163 properties:
163 !! 164 compatible:
164 - if: !! 165 contains:
165 properties: !! 166 enum:
166 compatible: !! 167 - renesas,rcar-gen2-scif
167 contains: !! 168 - renesas,rcar-gen3-scif
168 enum: !! 169 - renesas,rcar-gen4-scif
169 - renesas,rcar-gen2-scif !! 170 - renesas,scif-r9a07g044
170 - renesas,rcar-gen3-scif !! 171 then:
171 - renesas,rcar-gen4-scif !! 172 required:
172 - renesas,scif-r9a07g044 !! 173 - resets
173 - renesas,scif-r9a09g057 <<
174 then: <<
175 required: <<
176 - resets <<
177 <<
178 - if: <<
179 properties: <<
180 compatible: <<
181 contains: <<
182 enum: <<
183 - renesas,rcar-gen1-scif <<
184 - renesas,rcar-gen2-scif <<
185 - renesas,rcar-gen3-scif <<
186 - renesas,rcar-gen4-scif <<
187 then: <<
188 properties: <<
189 interrupts: <<
190 maxItems: 1 <<
191 <<
192 interrupt-names: false <<
193 else: <<
194 required: <<
195 - interrupt-names <<
196 <<
197 - if: <<
198 properties: <<
199 compatible: <<
200 contains: <<
201 enum: <<
202 - renesas,scif-r7s72100 <<
203 then: <<
204 properties: <<
205 interrupts: <<
206 minItems: 4 <<
207 maxItems: 4 <<
208 <<
209 interrupt-names: <<
210 maxItems: 4 <<
211 <<
212 - if: <<
213 properties: <<
214 compatible: <<
215 contains: <<
216 enum: <<
217 - renesas,scif-r7s9210 <<
218 - renesas,scif-r9a07g044 <<
219 then: <<
220 properties: <<
221 interrupts: <<
222 minItems: 6 <<
223 maxItems: 6 <<
224 <<
225 interrupt-names: <<
226 minItems: 6 <<
227 maxItems: 6 <<
228 <<
229 - if: <<
230 properties: <<
231 compatible: <<
232 contains: <<
233 const: renesas,scif-r9a09g057 <<
234 then: <<
235 properties: <<
236 clocks: <<
237 maxItems: 1 <<
238 <<
239 clock-names: <<
240 maxItems: 1 <<
241 <<
242 interrupts: <<
243 minItems: 9 <<
244 <<
245 interrupt-names: <<
246 minItems: 9 <<
247 174
248 unevaluatedProperties: false 175 unevaluatedProperties: false
249 176
250 examples: 177 examples:
251 - | 178 - |
252 #include <dt-bindings/clock/r8a7791-cpg-ms 179 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
253 #include <dt-bindings/interrupt-controller 180 #include <dt-bindings/interrupt-controller/arm-gic.h>
254 #include <dt-bindings/power/r8a7791-sysc.h 181 #include <dt-bindings/power/r8a7791-sysc.h>
255 aliases { 182 aliases {
256 serial0 = &scif0; 183 serial0 = &scif0;
257 }; 184 };
258 185
259 scif0: serial@e6e60000 { 186 scif0: serial@e6e60000 {
260 compatible = "renesas,scif-r8a7791", " 187 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
261 "renesas,scif"; 188 "renesas,scif";
262 reg = <0xe6e60000 64>; 189 reg = <0xe6e60000 64>;
263 interrupts = <GIC_SPI 152 IRQ_TYPE_LEV 190 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&cpg CPG_MOD 721>, <&cpg CPG 191 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
265 <&scif_clk>; 192 <&scif_clk>;
266 clock-names = "fck", "brg_int", "scif_ 193 clock-names = "fck", "brg_int", "scif_clk";
267 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, < 194 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
268 dma-names = "tx", "rx", "tx", "rx"; 195 dma-names = "tx", "rx", "tx", "rx";
269 power-domains = <&sysc R8A7791_PD_ALWA 196 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
270 resets = <&cpg 721>; 197 resets = <&cpg 721>;
271 }; 198 };
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