1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/serial/rene 4 $id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Renesas Serial Communication Interface 7 title: Renesas Serial Communication Interface with FIFO (SCIF)
8 8
9 maintainers: 9 maintainers:
10 - Geert Uytterhoeven <geert+renesas@glider.be 10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - renesas,scif-r7s72100 # RZ 17 - renesas,scif-r7s72100 # RZ/A1H
18 - const: renesas,scif # ge 18 - const: renesas,scif # generic SCIF compatible UART
19 19
20 - items: 20 - items:
21 - enum: 21 - enum:
22 - renesas,scif-r7s9210 # RZ 22 - renesas,scif-r7s9210 # RZ/A2
23 23
24 - items: 24 - items:
25 - enum: 25 - enum:
26 - renesas,scif-r8a7778 # R- 26 - renesas,scif-r8a7778 # R-Car M1
27 - renesas,scif-r8a7779 # R- 27 - renesas,scif-r8a7779 # R-Car H1
28 - const: renesas,rcar-gen1-scif # R- 28 - const: renesas,rcar-gen1-scif # R-Car Gen1
29 - const: renesas,scif # ge 29 - const: renesas,scif # generic SCIF compatible UART
30 30
31 - items: 31 - items:
32 - enum: 32 - enum:
33 - renesas,scif-r8a7742 # RZ 33 - renesas,scif-r8a7742 # RZ/G1H
34 - renesas,scif-r8a7743 # RZ 34 - renesas,scif-r8a7743 # RZ/G1M
35 - renesas,scif-r8a7744 # RZ 35 - renesas,scif-r8a7744 # RZ/G1N
36 - renesas,scif-r8a7745 # RZ 36 - renesas,scif-r8a7745 # RZ/G1E
37 - renesas,scif-r8a77470 # RZ 37 - renesas,scif-r8a77470 # RZ/G1C
38 - renesas,scif-r8a7790 # R- 38 - renesas,scif-r8a7790 # R-Car H2
39 - renesas,scif-r8a7791 # R- 39 - renesas,scif-r8a7791 # R-Car M2-W
40 - renesas,scif-r8a7792 # R- 40 - renesas,scif-r8a7792 # R-Car V2H
41 - renesas,scif-r8a7793 # R- 41 - renesas,scif-r8a7793 # R-Car M2-N
42 - renesas,scif-r8a7794 # R- 42 - renesas,scif-r8a7794 # R-Car E2
43 - const: renesas,rcar-gen2-scif # R- 43 - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
44 - const: renesas,scif # ge 44 - const: renesas,scif # generic SCIF compatible UART
45 45
46 - items: 46 - items:
47 - enum: 47 - enum:
48 - renesas,scif-r8a774a1 # RZ 48 - renesas,scif-r8a774a1 # RZ/G2M
49 - renesas,scif-r8a774a3 # RZ 49 - renesas,scif-r8a774a3 # RZ/G2M v3.0
50 - renesas,scif-r8a774b1 # RZ 50 - renesas,scif-r8a774b1 # RZ/G2N
51 - renesas,scif-r8a774c0 # RZ 51 - renesas,scif-r8a774c0 # RZ/G2E
52 - renesas,scif-r8a774e1 # RZ 52 - renesas,scif-r8a774e1 # RZ/G2H
53 - renesas,scif-r8a7795 # R- 53 - renesas,scif-r8a7795 # R-Car H3
54 - renesas,scif-r8a7796 # R- 54 - renesas,scif-r8a7796 # R-Car M3-W
55 - renesas,scif-r8a77961 # R- 55 - renesas,scif-r8a77961 # R-Car M3-W+
56 - renesas,scif-r8a77965 # R- 56 - renesas,scif-r8a77965 # R-Car M3-N
57 - renesas,scif-r8a77970 # R- 57 - renesas,scif-r8a77970 # R-Car V3M
58 - renesas,scif-r8a77980 # R- 58 - renesas,scif-r8a77980 # R-Car V3H
59 - renesas,scif-r8a77990 # R- 59 - renesas,scif-r8a77990 # R-Car E3
60 - renesas,scif-r8a77995 # R- 60 - renesas,scif-r8a77995 # R-Car D3
61 - const: renesas,rcar-gen3-scif # R- 61 - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
62 - const: renesas,scif # ge 62 - const: renesas,scif # generic SCIF compatible UART
63 63
64 - items: 64 - items:
65 - enum: 65 - enum:
66 - renesas,scif-r8a779a0 # R- 66 - renesas,scif-r8a779a0 # R-Car V3U
67 - renesas,scif-r8a779f0 # R- 67 - renesas,scif-r8a779f0 # R-Car S4-8
68 - renesas,scif-r8a779g0 # R- 68 - renesas,scif-r8a779g0 # R-Car V4H
69 - renesas,scif-r8a779h0 # R- 69 - renesas,scif-r8a779h0 # R-Car V4M
70 - const: renesas,rcar-gen4-scif # R- 70 - const: renesas,rcar-gen4-scif # R-Car Gen4
71 - const: renesas,scif # ge 71 - const: renesas,scif # generic SCIF compatible UART
72 72
73 - items: 73 - items:
74 - enum: 74 - enum:
75 - renesas,scif-r9a07g044 # 75 - renesas,scif-r9a07g044 # RZ/G2{L,LC}
76 76
77 - items: 77 - items:
78 - enum: 78 - enum:
79 - renesas,scif-r9a07g043 # 79 - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five
80 - renesas,scif-r9a07g054 # 80 - renesas,scif-r9a07g054 # RZ/V2L
81 - renesas,scif-r9a08g045 # 81 - renesas,scif-r9a08g045 # RZ/G3S
82 - const: renesas,scif-r9a07g044 # 82 - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
83 83
84 - const: renesas,scif-r9a09g057 # 84 - const: renesas,scif-r9a09g057 # RZ/V2H(P)
85 85
86 reg: 86 reg:
87 maxItems: 1 87 maxItems: 1
88 88
89 interrupts: 89 interrupts:
90 oneOf: 90 oneOf:
91 - items: 91 - items:
92 - description: A combined interrupt 92 - description: A combined interrupt
93 - items: 93 - items:
94 - description: Error interrupt 94 - description: Error interrupt
95 - description: Receive buffer full i 95 - description: Receive buffer full interrupt
96 - description: Transmit buffer empty 96 - description: Transmit buffer empty interrupt
97 - description: Break interrupt 97 - description: Break interrupt
98 - description: Data Ready interrupt 98 - description: Data Ready interrupt
99 - description: Transmit End interrup 99 - description: Transmit End interrupt
100 - description: Transmit End/Data Rea 100 - description: Transmit End/Data Ready interrupt
101 - description: Receive buffer full i 101 - description: Receive buffer full interrupt (EDGE trigger)
102 - description: Transmit buffer empty 102 - description: Transmit buffer empty interrupt (EDGE trigger)
103 minItems: 4 103 minItems: 4
104 104
105 interrupt-names: 105 interrupt-names:
106 minItems: 4 106 minItems: 4
107 items: 107 items:
108 - const: eri 108 - const: eri
109 - const: rxi 109 - const: rxi
110 - const: txi 110 - const: txi
111 - const: bri 111 - const: bri
112 - const: dri 112 - const: dri
113 - const: tei 113 - const: tei
114 - const: tei-dri 114 - const: tei-dri
115 - const: rxi-edge 115 - const: rxi-edge
116 - const: txi-edge 116 - const: txi-edge
117 117
118 clocks: 118 clocks:
119 minItems: 1 119 minItems: 1
120 maxItems: 4 120 maxItems: 4
121 121
122 clock-names: 122 clock-names:
123 minItems: 1 123 minItems: 1
124 maxItems: 4 124 maxItems: 4
125 items: 125 items:
126 enum: 126 enum:
127 - fck # UART functional clock 127 - fck # UART functional clock
128 - sck # optional external clock input 128 - sck # optional external clock input
129 - brg_int # optional internal clock so 129 - brg_int # optional internal clock source for BRG frequency divider
130 - scif_clk # optional external clock s 130 - scif_clk # optional external clock source for BRG frequency divider
131 131
132 power-domains: 132 power-domains:
133 maxItems: 1 133 maxItems: 1
134 134
135 resets: 135 resets:
136 maxItems: 1 136 maxItems: 1
137 137
138 dmas: 138 dmas:
139 minItems: 2 139 minItems: 2
140 maxItems: 4 140 maxItems: 4
141 description: 141 description:
142 Must contain a list of pairs of referenc 142 Must contain a list of pairs of references to DMA specifiers, one for
143 transmission, and one for reception. 143 transmission, and one for reception.
144 144
145 dma-names: 145 dma-names:
146 minItems: 2 146 minItems: 2
147 maxItems: 4 147 maxItems: 4
148 items: 148 items:
149 enum: 149 enum:
150 - tx 150 - tx
151 - rx 151 - rx
152 152
153 required: 153 required:
154 - compatible 154 - compatible
155 - reg 155 - reg
156 - interrupts 156 - interrupts
157 - clocks 157 - clocks
158 - clock-names 158 - clock-names
159 - power-domains 159 - power-domains
160 160
161 allOf: 161 allOf:
162 - $ref: serial.yaml# 162 - $ref: serial.yaml#
163 163
164 - if: 164 - if:
165 properties: 165 properties:
166 compatible: 166 compatible:
167 contains: 167 contains:
168 enum: 168 enum:
169 - renesas,rcar-gen2-scif 169 - renesas,rcar-gen2-scif
170 - renesas,rcar-gen3-scif 170 - renesas,rcar-gen3-scif
171 - renesas,rcar-gen4-scif 171 - renesas,rcar-gen4-scif
172 - renesas,scif-r9a07g044 172 - renesas,scif-r9a07g044
173 - renesas,scif-r9a09g057 173 - renesas,scif-r9a09g057
174 then: 174 then:
175 required: 175 required:
176 - resets 176 - resets
177 177
178 - if: 178 - if:
179 properties: 179 properties:
180 compatible: 180 compatible:
181 contains: 181 contains:
182 enum: 182 enum:
183 - renesas,rcar-gen1-scif 183 - renesas,rcar-gen1-scif
184 - renesas,rcar-gen2-scif 184 - renesas,rcar-gen2-scif
185 - renesas,rcar-gen3-scif 185 - renesas,rcar-gen3-scif
186 - renesas,rcar-gen4-scif 186 - renesas,rcar-gen4-scif
187 then: 187 then:
188 properties: 188 properties:
189 interrupts: 189 interrupts:
190 maxItems: 1 190 maxItems: 1
191 191
192 interrupt-names: false 192 interrupt-names: false
193 else: 193 else:
194 required: 194 required:
195 - interrupt-names 195 - interrupt-names
196 196
197 - if: 197 - if:
198 properties: 198 properties:
199 compatible: 199 compatible:
200 contains: 200 contains:
201 enum: 201 enum:
202 - renesas,scif-r7s72100 202 - renesas,scif-r7s72100
203 then: 203 then:
204 properties: 204 properties:
205 interrupts: 205 interrupts:
206 minItems: 4 206 minItems: 4
207 maxItems: 4 207 maxItems: 4
208 208
209 interrupt-names: 209 interrupt-names:
210 maxItems: 4 210 maxItems: 4
211 211
212 - if: 212 - if:
213 properties: 213 properties:
214 compatible: 214 compatible:
215 contains: 215 contains:
216 enum: 216 enum:
217 - renesas,scif-r7s9210 217 - renesas,scif-r7s9210
218 - renesas,scif-r9a07g044 218 - renesas,scif-r9a07g044
219 then: 219 then:
220 properties: 220 properties:
221 interrupts: 221 interrupts:
222 minItems: 6 222 minItems: 6
223 maxItems: 6 223 maxItems: 6
224 224
225 interrupt-names: 225 interrupt-names:
226 minItems: 6 226 minItems: 6
227 maxItems: 6 227 maxItems: 6
228 228
229 - if: 229 - if:
230 properties: 230 properties:
231 compatible: 231 compatible:
232 contains: 232 contains:
233 const: renesas,scif-r9a09g057 233 const: renesas,scif-r9a09g057
234 then: 234 then:
235 properties: 235 properties:
236 clocks: 236 clocks:
237 maxItems: 1 237 maxItems: 1
238 238
239 clock-names: 239 clock-names:
240 maxItems: 1 240 maxItems: 1
241 241
242 interrupts: 242 interrupts:
243 minItems: 9 243 minItems: 9
244 244
245 interrupt-names: 245 interrupt-names:
246 minItems: 9 246 minItems: 9
247 247
248 unevaluatedProperties: false 248 unevaluatedProperties: false
249 249
250 examples: 250 examples:
251 - | 251 - |
252 #include <dt-bindings/clock/r8a7791-cpg-ms 252 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
253 #include <dt-bindings/interrupt-controller 253 #include <dt-bindings/interrupt-controller/arm-gic.h>
254 #include <dt-bindings/power/r8a7791-sysc.h 254 #include <dt-bindings/power/r8a7791-sysc.h>
255 aliases { 255 aliases {
256 serial0 = &scif0; 256 serial0 = &scif0;
257 }; 257 };
258 258
259 scif0: serial@e6e60000 { 259 scif0: serial@e6e60000 {
260 compatible = "renesas,scif-r8a7791", " 260 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
261 "renesas,scif"; 261 "renesas,scif";
262 reg = <0xe6e60000 64>; 262 reg = <0xe6e60000 64>;
263 interrupts = <GIC_SPI 152 IRQ_TYPE_LEV 263 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
264 clocks = <&cpg CPG_MOD 721>, <&cpg CPG 264 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
265 <&scif_clk>; 265 <&scif_clk>;
266 clock-names = "fck", "brg_int", "scif_ 266 clock-names = "fck", "brg_int", "scif_clk";
267 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, < 267 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
268 dma-names = "tx", "rx", "tx", "rx"; 268 dma-names = "tx", "rx", "tx", "rx";
269 power-domains = <&sysc R8A7791_PD_ALWA 269 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
270 resets = <&cpg 721>; 270 resets = <&cpg 721>;
271 }; 271 };
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