1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/soc/intel/i 4 $id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Intel Lightning Mountain(LGM) Syscon 7 title: Intel Lightning Mountain(LGM) Syscon
8 8
9 maintainers: 9 maintainers:
10 - Chuanhua Lei <lchuanhua@maxlinear.com> 10 - Chuanhua Lei <lchuanhua@maxlinear.com>
11 - Rahul Tanwar <rtanwar@maxlinear.com> 11 - Rahul Tanwar <rtanwar@maxlinear.com>
12 12
13 properties: 13 properties:
14 compatible: 14 compatible:
15 items: 15 items:
16 - const: intel,lgm-syscon 16 - const: intel,lgm-syscon
17 - const: syscon 17 - const: syscon
18 18
19 reg: 19 reg:
20 maxItems: 1 20 maxItems: 1
21 21
22 ranges: true 22 ranges: true
23 23
24 "#address-cells": 24 "#address-cells":
25 const: 1 25 const: 1
26 26
27 "#size-cells": 27 "#size-cells":
28 const: 1 28 const: 1
29 29
30 patternProperties: 30 patternProperties:
31 "^emmc-phy@[0-9a-f]+$": 31 "^emmc-phy@[0-9a-f]+$":
32 $ref: /schemas/phy/intel,lgm-emmc-phy.yaml 32 $ref: /schemas/phy/intel,lgm-emmc-phy.yaml#
33 33
34 required: 34 required:
35 - compatible 35 - compatible
36 - reg 36 - reg
37 - "#address-cells" 37 - "#address-cells"
38 - "#size-cells" 38 - "#size-cells"
39 39
40 additionalProperties: false 40 additionalProperties: false
41 41
42 examples: 42 examples:
43 - | 43 - |
44 chiptop@e0200000 { 44 chiptop@e0200000 {
45 compatible = "intel,lgm-syscon", "sysc 45 compatible = "intel,lgm-syscon", "syscon";
46 reg = <0xe0200000 0x100>; 46 reg = <0xe0200000 0x100>;
47 ranges = <0x0 0xe0200000 0x100>; 47 ranges = <0x0 0xe0200000 0x100>;
48 #address-cells = <1>; 48 #address-cells = <1>;
49 #size-cells = <1>; 49 #size-cells = <1>;
50 50
51 emmc-phy@a8 { 51 emmc-phy@a8 {
52 compatible = "intel,lgm-emmc-phy"; 52 compatible = "intel,lgm-emmc-phy";
53 reg = <0x00a8 0x10>; 53 reg = <0x00a8 0x10>;
54 clocks = <&emmc>; 54 clocks = <&emmc>;
55 #phy-cells = <0>; 55 #phy-cells = <0>;
56 }; 56 };
57 }; 57 };
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