1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/soc/samsung 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung's Exynos USI (Universal Serial !! 7 title: Samsung's Exynos USI (Universal Serial Interface) binding
8 8
9 maintainers: 9 maintainers:
10 - Sam Protsenko <semen.protsenko@linaro.org> 10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Krzysztof Kozlowski <krzk@kernel.org>
12 12
13 description: | 13 description: |
14 USI IP-core provides selectable serial proto 14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
15 USI shares almost all internal circuits with 15 USI shares almost all internal circuits within each protocol, so only one
16 protocol can be chosen at a time. USI is mod 16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub- 17 child nodes, each representing a serial sub-node device. The mode setting
18 selects which particular function will be us 18 selects which particular function will be used.
19 19
20 properties: 20 properties:
21 $nodename: 21 $nodename:
22 pattern: "^usi@[0-9a-f]+$" 22 pattern: "^usi@[0-9a-f]+$"
23 23
24 compatible: 24 compatible:
25 oneOf: !! 25 enum:
26 - items: !! 26 - samsung,exynos850-usi # for USIv2 (Exynos850, ExynosAutoV9)
27 - enum: <<
28 - google,gs101-usi <<
29 - samsung,exynosautov9-usi <<
30 - samsung,exynosautov920-usi <<
31 - const: samsung,exynos850-usi <<
32 - enum: <<
33 - samsung,exynos850-usi <<
34 27
35 reg: !! 28 reg: true
36 maxItems: 1 <<
37 29
38 clocks: !! 30 clocks: true
39 maxItems: 2 <<
40 31
41 clock-names: !! 32 clock-names: true
42 items: <<
43 - const: pclk <<
44 - const: ipclk <<
45 33
46 ranges: true 34 ranges: true
47 35
48 "#address-cells": 36 "#address-cells":
49 const: 1 37 const: 1
50 38
51 "#size-cells": 39 "#size-cells":
52 const: 1 40 const: 1
53 41
54 samsung,sysreg: 42 samsung,sysreg:
55 $ref: /schemas/types.yaml#/definitions/pha 43 $ref: /schemas/types.yaml#/definitions/phandle-array
56 items: 44 items:
57 - items: 45 - items:
58 - description: phandle to System Reg 46 - description: phandle to System Register syscon node
59 - description: offset of SW_CONF reg 47 - description: offset of SW_CONF register for this USI controller
60 description: 48 description:
61 Should be phandle/offset pair. The phand 49 Should be phandle/offset pair. The phandle to System Register syscon node
62 (for the same domain where this USI cont 50 (for the same domain where this USI controller resides) and the offset
63 of SW_CONF register for this USI control 51 of SW_CONF register for this USI controller.
64 52
65 samsung,mode: 53 samsung,mode:
66 $ref: /schemas/types.yaml#/definitions/uin 54 $ref: /schemas/types.yaml#/definitions/uint32
67 description: 55 description:
68 Selects USI function (which serial proto 56 Selects USI function (which serial protocol to use). Refer to
69 <include/dt-bindings/soc/samsung,exynos- 57 <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
70 58
71 samsung,clkreq-on: 59 samsung,clkreq-on:
72 type: boolean 60 type: boolean
73 description: 61 description:
74 Enable this property if underlying proto 62 Enable this property if underlying protocol requires the clock to be
75 continuously provided without automatic 63 continuously provided without automatic gating. As suggested by SoC
76 manual, it should be set in case of SPI/ 64 manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
77 multi-master mode. Usually this property 65 multi-master mode. Usually this property is needed if USI mode is set
78 to "UART". 66 to "UART".
79 67
80 This property is optional. 68 This property is optional.
81 69
82 patternProperties: 70 patternProperties:
83 "^i2c@[0-9a-f]+$": 71 "^i2c@[0-9a-f]+$":
84 $ref: /schemas/i2c/i2c-exynos5.yaml 72 $ref: /schemas/i2c/i2c-exynos5.yaml
85 description: Child node describing underly 73 description: Child node describing underlying I2C
86 74
87 "^serial@[0-9a-f]+$": 75 "^serial@[0-9a-f]+$":
88 $ref: /schemas/serial/samsung_uart.yaml 76 $ref: /schemas/serial/samsung_uart.yaml
89 description: Child node describing underly 77 description: Child node describing underlying UART/serial
90 78
91 "^spi@[0-9a-f]+$": 79 "^spi@[0-9a-f]+$":
92 $ref: /schemas/spi/samsung,spi.yaml !! 80 type: object
93 description: Child node describing underly 81 description: Child node describing underlying SPI
94 82
95 required: 83 required:
96 - compatible 84 - compatible
97 - ranges 85 - ranges
98 - "#address-cells" 86 - "#address-cells"
99 - "#size-cells" 87 - "#size-cells"
100 - samsung,sysreg 88 - samsung,sysreg
101 - samsung,mode 89 - samsung,mode
102 90
103 if: 91 if:
104 properties: 92 properties:
105 compatible: 93 compatible:
106 contains: 94 contains:
107 enum: 95 enum:
108 - samsung,exynos850-usi 96 - samsung,exynos850-usi
109 97
110 then: 98 then:
111 properties: 99 properties:
112 reg: 100 reg:
113 maxItems: 1 101 maxItems: 1
114 102
115 clocks: 103 clocks:
116 items: 104 items:
117 - description: Bus (APB) clock 105 - description: Bus (APB) clock
118 - description: Operating clock for UAR 106 - description: Operating clock for UART/SPI/I2C protocol
119 107
120 clock-names: 108 clock-names:
121 maxItems: 2 !! 109 items:
>> 110 - const: pclk
>> 111 - const: ipclk
122 112
123 required: 113 required:
124 - reg 114 - reg
125 - clocks 115 - clocks
126 - clock-names 116 - clock-names
127 117
128 else: 118 else:
129 properties: 119 properties:
130 reg: false 120 reg: false
131 clocks: false 121 clocks: false
132 clock-names: false 122 clock-names: false
133 samsung,clkreq-on: false 123 samsung,clkreq-on: false
134 124
135 additionalProperties: false 125 additionalProperties: false
136 126
137 examples: 127 examples:
138 - | 128 - |
139 #include <dt-bindings/interrupt-controller 129 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 #include <dt-bindings/soc/samsung,exynos-u 130 #include <dt-bindings/soc/samsung,exynos-usi.h>
141 131
142 usi0: usi@138200c0 { 132 usi0: usi@138200c0 {
143 compatible = "samsung,exynos850-usi"; 133 compatible = "samsung,exynos850-usi";
144 reg = <0x138200c0 0x20>; 134 reg = <0x138200c0 0x20>;
145 samsung,sysreg = <&sysreg_peri 0x1010> 135 samsung,sysreg = <&sysreg_peri 0x1010>;
146 samsung,mode = <USI_V2_UART>; 136 samsung,mode = <USI_V2_UART>;
147 samsung,clkreq-on; /* needed for UART 137 samsung,clkreq-on; /* needed for UART mode */
148 #address-cells = <1>; 138 #address-cells = <1>;
149 #size-cells = <1>; 139 #size-cells = <1>;
150 ranges; 140 ranges;
151 clocks = <&cmu_peri 32>, <&cmu_peri 31 141 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
152 clock-names = "pclk", "ipclk"; 142 clock-names = "pclk", "ipclk";
153 143
154 serial_0: serial@13820000 { 144 serial_0: serial@13820000 {
155 compatible = "samsung,exynos850-ua 145 compatible = "samsung,exynos850-uart";
156 reg = <0x13820000 0xc0>; 146 reg = <0x13820000 0xc0>;
157 interrupts = <GIC_SPI 227 IRQ_TYPE 147 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&cmu_peri 32>, <&cmu_per 148 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
159 clock-names = "uart", "clk_uart_ba 149 clock-names = "uart", "clk_uart_baud0";
160 status = "disabled"; 150 status = "disabled";
161 }; 151 };
162 152
163 hsi2c_0: i2c@13820000 { 153 hsi2c_0: i2c@13820000 {
164 compatible = "samsung,exynos850-hs !! 154 compatible = "samsung,exynosautov9-hsi2c";
165 reg = <0x13820000 0xc0>; 155 reg = <0x13820000 0xc0>;
166 interrupts = <GIC_SPI 227 IRQ_TYPE 156 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
167 #address-cells = <1>; 157 #address-cells = <1>;
168 #size-cells = <0>; 158 #size-cells = <0>;
169 clocks = <&cmu_peri 31>, <&cmu_per 159 clocks = <&cmu_peri 31>, <&cmu_peri 32>;
170 clock-names = "hsi2c", "hsi2c_pclk 160 clock-names = "hsi2c", "hsi2c_pclk";
171 status = "disabled"; 161 status = "disabled";
172 }; 162 };
173 }; 163 };
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