1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/soc/samsung 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung's Exynos USI (Universal Serial 7 title: Samsung's Exynos USI (Universal Serial Interface)
8 8
9 maintainers: 9 maintainers:
10 - Sam Protsenko <semen.protsenko@linaro.org> 10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Krzysztof Kozlowski <krzk@kernel.org>
12 12
13 description: | 13 description: |
14 USI IP-core provides selectable serial proto 14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
15 USI shares almost all internal circuits with 15 USI shares almost all internal circuits within each protocol, so only one
16 protocol can be chosen at a time. USI is mod 16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub- 17 child nodes, each representing a serial sub-node device. The mode setting
18 selects which particular function will be us 18 selects which particular function will be used.
19 19
20 properties: 20 properties:
21 $nodename: 21 $nodename:
22 pattern: "^usi@[0-9a-f]+$" 22 pattern: "^usi@[0-9a-f]+$"
23 23
24 compatible: 24 compatible:
25 oneOf: 25 oneOf:
26 - items: 26 - items:
27 - enum: !! 27 - const: samsung,exynosautov9-usi
28 - google,gs101-usi <<
29 - samsung,exynosautov9-usi <<
30 - samsung,exynosautov920-usi <<
31 - const: samsung,exynos850-usi 28 - const: samsung,exynos850-usi
32 - enum: 29 - enum:
33 - samsung,exynos850-usi 30 - samsung,exynos850-usi
34 31
35 reg: !! 32 reg: true
36 maxItems: 1 <<
37 33
38 clocks: !! 34 clocks: true
39 maxItems: 2 <<
40 35
41 clock-names: !! 36 clock-names: true
42 items: <<
43 - const: pclk <<
44 - const: ipclk <<
45 37
46 ranges: true 38 ranges: true
47 39
48 "#address-cells": 40 "#address-cells":
49 const: 1 41 const: 1
50 42
51 "#size-cells": 43 "#size-cells":
52 const: 1 44 const: 1
53 45
54 samsung,sysreg: 46 samsung,sysreg:
55 $ref: /schemas/types.yaml#/definitions/pha 47 $ref: /schemas/types.yaml#/definitions/phandle-array
56 items: 48 items:
57 - items: 49 - items:
58 - description: phandle to System Reg 50 - description: phandle to System Register syscon node
59 - description: offset of SW_CONF reg 51 - description: offset of SW_CONF register for this USI controller
60 description: 52 description:
61 Should be phandle/offset pair. The phand 53 Should be phandle/offset pair. The phandle to System Register syscon node
62 (for the same domain where this USI cont 54 (for the same domain where this USI controller resides) and the offset
63 of SW_CONF register for this USI control 55 of SW_CONF register for this USI controller.
64 56
65 samsung,mode: 57 samsung,mode:
66 $ref: /schemas/types.yaml#/definitions/uin 58 $ref: /schemas/types.yaml#/definitions/uint32
67 description: 59 description:
68 Selects USI function (which serial proto 60 Selects USI function (which serial protocol to use). Refer to
69 <include/dt-bindings/soc/samsung,exynos- 61 <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
70 62
71 samsung,clkreq-on: 63 samsung,clkreq-on:
72 type: boolean 64 type: boolean
73 description: 65 description:
74 Enable this property if underlying proto 66 Enable this property if underlying protocol requires the clock to be
75 continuously provided without automatic 67 continuously provided without automatic gating. As suggested by SoC
76 manual, it should be set in case of SPI/ 68 manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
77 multi-master mode. Usually this property 69 multi-master mode. Usually this property is needed if USI mode is set
78 to "UART". 70 to "UART".
79 71
80 This property is optional. 72 This property is optional.
81 73
82 patternProperties: 74 patternProperties:
83 "^i2c@[0-9a-f]+$": 75 "^i2c@[0-9a-f]+$":
84 $ref: /schemas/i2c/i2c-exynos5.yaml 76 $ref: /schemas/i2c/i2c-exynos5.yaml
85 description: Child node describing underly 77 description: Child node describing underlying I2C
86 78
87 "^serial@[0-9a-f]+$": 79 "^serial@[0-9a-f]+$":
88 $ref: /schemas/serial/samsung_uart.yaml 80 $ref: /schemas/serial/samsung_uart.yaml
89 description: Child node describing underly 81 description: Child node describing underlying UART/serial
90 82
91 "^spi@[0-9a-f]+$": 83 "^spi@[0-9a-f]+$":
92 $ref: /schemas/spi/samsung,spi.yaml 84 $ref: /schemas/spi/samsung,spi.yaml
93 description: Child node describing underly 85 description: Child node describing underlying SPI
94 86
95 required: 87 required:
96 - compatible 88 - compatible
97 - ranges 89 - ranges
98 - "#address-cells" 90 - "#address-cells"
99 - "#size-cells" 91 - "#size-cells"
100 - samsung,sysreg 92 - samsung,sysreg
101 - samsung,mode 93 - samsung,mode
102 94
103 if: 95 if:
104 properties: 96 properties:
105 compatible: 97 compatible:
106 contains: 98 contains:
107 enum: 99 enum:
108 - samsung,exynos850-usi 100 - samsung,exynos850-usi
109 101
110 then: 102 then:
111 properties: 103 properties:
112 reg: 104 reg:
113 maxItems: 1 105 maxItems: 1
114 106
115 clocks: 107 clocks:
116 items: 108 items:
117 - description: Bus (APB) clock 109 - description: Bus (APB) clock
118 - description: Operating clock for UAR 110 - description: Operating clock for UART/SPI/I2C protocol
119 111
120 clock-names: 112 clock-names:
121 maxItems: 2 !! 113 items:
>> 114 - const: pclk
>> 115 - const: ipclk
122 116
123 required: 117 required:
124 - reg 118 - reg
125 - clocks 119 - clocks
126 - clock-names 120 - clock-names
127 121
128 else: 122 else:
129 properties: 123 properties:
130 reg: false 124 reg: false
131 clocks: false 125 clocks: false
132 clock-names: false 126 clock-names: false
133 samsung,clkreq-on: false 127 samsung,clkreq-on: false
134 128
135 additionalProperties: false 129 additionalProperties: false
136 130
137 examples: 131 examples:
138 - | 132 - |
139 #include <dt-bindings/interrupt-controller 133 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 #include <dt-bindings/soc/samsung,exynos-u 134 #include <dt-bindings/soc/samsung,exynos-usi.h>
141 135
142 usi0: usi@138200c0 { 136 usi0: usi@138200c0 {
143 compatible = "samsung,exynos850-usi"; 137 compatible = "samsung,exynos850-usi";
144 reg = <0x138200c0 0x20>; 138 reg = <0x138200c0 0x20>;
145 samsung,sysreg = <&sysreg_peri 0x1010> 139 samsung,sysreg = <&sysreg_peri 0x1010>;
146 samsung,mode = <USI_V2_UART>; 140 samsung,mode = <USI_V2_UART>;
147 samsung,clkreq-on; /* needed for UART 141 samsung,clkreq-on; /* needed for UART mode */
148 #address-cells = <1>; 142 #address-cells = <1>;
149 #size-cells = <1>; 143 #size-cells = <1>;
150 ranges; 144 ranges;
151 clocks = <&cmu_peri 32>, <&cmu_peri 31 145 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
152 clock-names = "pclk", "ipclk"; 146 clock-names = "pclk", "ipclk";
153 147
154 serial_0: serial@13820000 { 148 serial_0: serial@13820000 {
155 compatible = "samsung,exynos850-ua 149 compatible = "samsung,exynos850-uart";
156 reg = <0x13820000 0xc0>; 150 reg = <0x13820000 0xc0>;
157 interrupts = <GIC_SPI 227 IRQ_TYPE 151 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&cmu_peri 32>, <&cmu_per 152 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
159 clock-names = "uart", "clk_uart_ba 153 clock-names = "uart", "clk_uart_baud0";
160 status = "disabled"; 154 status = "disabled";
161 }; 155 };
162 156
163 hsi2c_0: i2c@13820000 { 157 hsi2c_0: i2c@13820000 {
164 compatible = "samsung,exynos850-hs !! 158 compatible = "samsung,exynosautov9-hsi2c";
165 reg = <0x13820000 0xc0>; 159 reg = <0x13820000 0xc0>;
166 interrupts = <GIC_SPI 227 IRQ_TYPE 160 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
167 #address-cells = <1>; 161 #address-cells = <1>;
168 #size-cells = <0>; 162 #size-cells = <0>;
169 clocks = <&cmu_peri 31>, <&cmu_per 163 clocks = <&cmu_peri 31>, <&cmu_peri 32>;
170 clock-names = "hsi2c", "hsi2c_pclk 164 clock-names = "hsi2c", "hsi2c_pclk";
171 status = "disabled"; 165 status = "disabled";
172 }; 166 };
173 }; 167 };
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