1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/soc/samsung 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung's Exynos USI (Universal Serial 7 title: Samsung's Exynos USI (Universal Serial Interface)
8 8
9 maintainers: 9 maintainers:
10 - Sam Protsenko <semen.protsenko@linaro.org> 10 - Sam Protsenko <semen.protsenko@linaro.org>
11 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Krzysztof Kozlowski <krzk@kernel.org>
12 12
13 description: | 13 description: |
14 USI IP-core provides selectable serial proto 14 USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).
15 USI shares almost all internal circuits with 15 USI shares almost all internal circuits within each protocol, so only one
16 protocol can be chosen at a time. USI is mod 16 protocol can be chosen at a time. USI is modeled as a node with zero or more
17 child nodes, each representing a serial sub- 17 child nodes, each representing a serial sub-node device. The mode setting
18 selects which particular function will be us 18 selects which particular function will be used.
19 19
20 properties: 20 properties:
21 $nodename: 21 $nodename:
22 pattern: "^usi@[0-9a-f]+$" 22 pattern: "^usi@[0-9a-f]+$"
23 23
24 compatible: 24 compatible:
25 oneOf: 25 oneOf:
26 - items: 26 - items:
27 - enum: 27 - enum:
28 - google,gs101-usi 28 - google,gs101-usi
29 - samsung,exynosautov9-usi 29 - samsung,exynosautov9-usi
30 - samsung,exynosautov920-usi 30 - samsung,exynosautov920-usi
31 - const: samsung,exynos850-usi 31 - const: samsung,exynos850-usi
32 - enum: 32 - enum:
33 - samsung,exynos850-usi 33 - samsung,exynos850-usi
34 34
35 reg: !! 35 reg: true
36 maxItems: 1 <<
37 36
38 clocks: !! 37 clocks: true
39 maxItems: 2 <<
40 38
41 clock-names: !! 39 clock-names: true
42 items: <<
43 - const: pclk <<
44 - const: ipclk <<
45 40
46 ranges: true 41 ranges: true
47 42
48 "#address-cells": 43 "#address-cells":
49 const: 1 44 const: 1
50 45
51 "#size-cells": 46 "#size-cells":
52 const: 1 47 const: 1
53 48
54 samsung,sysreg: 49 samsung,sysreg:
55 $ref: /schemas/types.yaml#/definitions/pha 50 $ref: /schemas/types.yaml#/definitions/phandle-array
56 items: 51 items:
57 - items: 52 - items:
58 - description: phandle to System Reg 53 - description: phandle to System Register syscon node
59 - description: offset of SW_CONF reg 54 - description: offset of SW_CONF register for this USI controller
60 description: 55 description:
61 Should be phandle/offset pair. The phand 56 Should be phandle/offset pair. The phandle to System Register syscon node
62 (for the same domain where this USI cont 57 (for the same domain where this USI controller resides) and the offset
63 of SW_CONF register for this USI control 58 of SW_CONF register for this USI controller.
64 59
65 samsung,mode: 60 samsung,mode:
66 $ref: /schemas/types.yaml#/definitions/uin 61 $ref: /schemas/types.yaml#/definitions/uint32
67 description: 62 description:
68 Selects USI function (which serial proto 63 Selects USI function (which serial protocol to use). Refer to
69 <include/dt-bindings/soc/samsung,exynos- 64 <include/dt-bindings/soc/samsung,exynos-usi.h> for valid USI mode values.
70 65
71 samsung,clkreq-on: 66 samsung,clkreq-on:
72 type: boolean 67 type: boolean
73 description: 68 description:
74 Enable this property if underlying proto 69 Enable this property if underlying protocol requires the clock to be
75 continuously provided without automatic 70 continuously provided without automatic gating. As suggested by SoC
76 manual, it should be set in case of SPI/ 71 manual, it should be set in case of SPI/I2C slave, UART Rx and I2C
77 multi-master mode. Usually this property 72 multi-master mode. Usually this property is needed if USI mode is set
78 to "UART". 73 to "UART".
79 74
80 This property is optional. 75 This property is optional.
81 76
82 patternProperties: 77 patternProperties:
83 "^i2c@[0-9a-f]+$": 78 "^i2c@[0-9a-f]+$":
84 $ref: /schemas/i2c/i2c-exynos5.yaml 79 $ref: /schemas/i2c/i2c-exynos5.yaml
85 description: Child node describing underly 80 description: Child node describing underlying I2C
86 81
87 "^serial@[0-9a-f]+$": 82 "^serial@[0-9a-f]+$":
88 $ref: /schemas/serial/samsung_uart.yaml 83 $ref: /schemas/serial/samsung_uart.yaml
89 description: Child node describing underly 84 description: Child node describing underlying UART/serial
90 85
91 "^spi@[0-9a-f]+$": 86 "^spi@[0-9a-f]+$":
92 $ref: /schemas/spi/samsung,spi.yaml 87 $ref: /schemas/spi/samsung,spi.yaml
93 description: Child node describing underly 88 description: Child node describing underlying SPI
94 89
95 required: 90 required:
96 - compatible 91 - compatible
97 - ranges 92 - ranges
98 - "#address-cells" 93 - "#address-cells"
99 - "#size-cells" 94 - "#size-cells"
100 - samsung,sysreg 95 - samsung,sysreg
101 - samsung,mode 96 - samsung,mode
102 97
103 if: 98 if:
104 properties: 99 properties:
105 compatible: 100 compatible:
106 contains: 101 contains:
107 enum: 102 enum:
108 - samsung,exynos850-usi 103 - samsung,exynos850-usi
109 104
110 then: 105 then:
111 properties: 106 properties:
112 reg: 107 reg:
113 maxItems: 1 108 maxItems: 1
114 109
115 clocks: 110 clocks:
116 items: 111 items:
117 - description: Bus (APB) clock 112 - description: Bus (APB) clock
118 - description: Operating clock for UAR 113 - description: Operating clock for UART/SPI/I2C protocol
119 114
120 clock-names: 115 clock-names:
121 maxItems: 2 !! 116 items:
>> 117 - const: pclk
>> 118 - const: ipclk
122 119
123 required: 120 required:
124 - reg 121 - reg
125 - clocks 122 - clocks
126 - clock-names 123 - clock-names
127 124
128 else: 125 else:
129 properties: 126 properties:
130 reg: false 127 reg: false
131 clocks: false 128 clocks: false
132 clock-names: false 129 clock-names: false
133 samsung,clkreq-on: false 130 samsung,clkreq-on: false
134 131
135 additionalProperties: false 132 additionalProperties: false
136 133
137 examples: 134 examples:
138 - | 135 - |
139 #include <dt-bindings/interrupt-controller 136 #include <dt-bindings/interrupt-controller/arm-gic.h>
140 #include <dt-bindings/soc/samsung,exynos-u 137 #include <dt-bindings/soc/samsung,exynos-usi.h>
141 138
142 usi0: usi@138200c0 { 139 usi0: usi@138200c0 {
143 compatible = "samsung,exynos850-usi"; 140 compatible = "samsung,exynos850-usi";
144 reg = <0x138200c0 0x20>; 141 reg = <0x138200c0 0x20>;
145 samsung,sysreg = <&sysreg_peri 0x1010> 142 samsung,sysreg = <&sysreg_peri 0x1010>;
146 samsung,mode = <USI_V2_UART>; 143 samsung,mode = <USI_V2_UART>;
147 samsung,clkreq-on; /* needed for UART 144 samsung,clkreq-on; /* needed for UART mode */
148 #address-cells = <1>; 145 #address-cells = <1>;
149 #size-cells = <1>; 146 #size-cells = <1>;
150 ranges; 147 ranges;
151 clocks = <&cmu_peri 32>, <&cmu_peri 31 148 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
152 clock-names = "pclk", "ipclk"; 149 clock-names = "pclk", "ipclk";
153 150
154 serial_0: serial@13820000 { 151 serial_0: serial@13820000 {
155 compatible = "samsung,exynos850-ua 152 compatible = "samsung,exynos850-uart";
156 reg = <0x13820000 0xc0>; 153 reg = <0x13820000 0xc0>;
157 interrupts = <GIC_SPI 227 IRQ_TYPE 154 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
158 clocks = <&cmu_peri 32>, <&cmu_per 155 clocks = <&cmu_peri 32>, <&cmu_peri 31>;
159 clock-names = "uart", "clk_uart_ba 156 clock-names = "uart", "clk_uart_baud0";
160 status = "disabled"; 157 status = "disabled";
161 }; 158 };
162 159
163 hsi2c_0: i2c@13820000 { 160 hsi2c_0: i2c@13820000 {
164 compatible = "samsung,exynos850-hs 161 compatible = "samsung,exynos850-hsi2c", "samsung,exynosautov9-hsi2c";
165 reg = <0x13820000 0xc0>; 162 reg = <0x13820000 0xc0>;
166 interrupts = <GIC_SPI 227 IRQ_TYPE 163 interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
167 #address-cells = <1>; 164 #address-cells = <1>;
168 #size-cells = <0>; 165 #size-cells = <0>;
169 clocks = <&cmu_peri 31>, <&cmu_per 166 clocks = <&cmu_peri 31>, <&cmu_peri 32>;
170 clock-names = "hsi2c", "hsi2c_pclk 167 clock-names = "hsi2c", "hsi2c_pclk";
171 status = "disabled"; 168 status = "disabled";
172 }; 169 };
173 }; 170 };
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