1 # SPDX-License-Identifier: (GPL-2.0-only OR BS
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,s
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Freescale Synchronous Audio Interface (
8
9 maintainers:
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
11
12 description: |
13 The SAI is based on I2S module that used com
14 which provides a synchronous audio interface
15 serial interfaces with frame synchronization
16 codec/DSP interfaces.
17
18 properties:
19 compatible:
20 oneOf:
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
26
27 - items:
28 - enum:
29 - fsl,imx8mm-sai
30 - fsl,imx8mn-sai
31 - fsl,imx8mp-sai
32 - const: fsl,imx8mq-sai
33
34 - items:
35 - enum:
36 - fsl,imx6sx-sai
37 - fsl,imx7ulp-sai
38 - fsl,imx8mq-sai
39 - fsl,imx8qm-sai
40 - fsl,imx8ulp-sai
41 - fsl,imx93-sai
42 - fsl,imx95-sai
43 - fsl,vf610-sai
44
45 reg:
46 maxItems: 1
47
48 clocks:
49 items:
50 - description: The ipg clock for registe
51 - description: master clock source 0 (ob
52 - description: master clock source 1
53 - description: master clock source 2
54 - description: master clock source 3
55 - description: PLL clock source for 8kHz
56 - description: PLL clock source for 11kH
57 minItems: 4
58
59 clock-names:
60 oneOf:
61 - items:
62 - const: bus
63 - const: mclk0
64 - const: mclk1
65 - const: mclk2
66 - const: mclk3
67 - const: pll8k
68 - const: pll11k
69 minItems: 5
70 - items:
71 - const: bus
72 - const: mclk1
73 - const: mclk2
74 - const: mclk3
75 - const: pll8k
76 - const: pll11k
77 minItems: 4
78
79 power-domains:
80 maxItems: 1
81
82 dmas:
83 minItems: 1
84 maxItems: 2
85
86 dma-names:
87 minItems: 1
88 items:
89 - enum: [ rx, tx ]
90 - const: tx
91
92 interrupts:
93 items:
94 - description: receive and transmit inte
95
96 big-endian:
97 description: |
98 required if all the SAI registers are bi
99 type: boolean
100
101 fsl,dataline:
102 $ref: /schemas/types.yaml#/definitions/uin
103 description: |
104 Configure the dataline. It has 3 value f
105 maxItems: 16
106 items:
107 items:
108 - description: format Default(0), I2S(
109 enum: [0, 1, 2]
110 - description: dataline mask for 'rx'
111 - description: dataline mask for 'tx'
112
113 fsl,sai-mclk-direction-output:
114 description: SAI will output the SAI MCLK
115 type: boolean
116
117 fsl,sai-synchronous-rx:
118 description: |
119 SAI will work in the synchronous mode (s
120 both the transmitter and the receiver wi
121 following receiver's bit clocks and fram
122 type: boolean
123
124 fsl,sai-asynchronous:
125 description: |
126 SAI will work in the asynchronous mode,
127 and receiver will send and receive data
128 and frame sync clocks separately.
129 If both fsl,sai-asynchronous and fsl,sai
130 default synchronous mode (sync Rx with T
131 transmitter and receiver will send and r
132 of transmitter.
133 type: boolean
134
135 fsl,shared-interrupt:
136 description: Interrupt is shared with othe
137 type: boolean
138
139 lsb-first:
140 description: |
141 Configures whether the LSB or the MSB is
142 first for the fifo data. If this propert
143 the MSB is transmitted first as default,
144 is transmitted first.
145 type: boolean
146
147 "#sound-dai-cells":
148 const: 0
149 description: optional, some dts node didn'
150
151 allOf:
152 - $ref: dai-common.yaml#
153 - if:
154 required:
155 - fsl,sai-asynchronous
156 then:
157 properties:
158 fsl,sai-synchronous-rx: false
159
160 required:
161 - compatible
162 - reg
163 - clocks
164 - clock-names
165 - dmas
166 - dma-names
167 - interrupts
168
169 unevaluatedProperties: false
170
171 examples:
172 - |
173 #include <dt-bindings/interrupt-controller
174 #include <dt-bindings/clock/vf610-clock.h>
175 sai2: sai@40031000 {
176 compatible = "fsl,vf610-sai";
177 reg = <0x40031000 0x1000>;
178 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_sai2_1>;
181 clocks = <&clks VF610_CLK_PLATFORM_BUS
182 <&clks VF610_CLK_SAI2>,
183 <&clks 0>, <&clks 0>;
184 clock-names = "bus", "mclk1", "mclk2",
185 dma-names = "rx", "tx";
186 dmas = <&edma0 0 20>, <&edma0 0 21>;
187 big-endian;
188 lsb-first;
189 };
190
191 - |
192 #include <dt-bindings/interrupt-controller
193 #include <dt-bindings/clock/imx8mm-clock.h
194 sai1: sai@30010000 {
195 compatible = "fsl,imx8mm-sai", "fsl,im
196 reg = <0x30010000 0x10000>;
197 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVE
198 clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
199 <&clk IMX8MM_CLK_DUMMY>,
200 <&clk IMX8MM_CLK_SAI1_ROOT>,
201 <&clk IMX8MM_CLK_DUMMY>, <&cl
202 clock-names = "bus", "mclk0", "mclk1",
203 dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
204 dma-names = "rx", "tx";
205 fsl,dataline = <1 0xff 0xff 2 0xff 0x1
206 #sound-dai-cells = <0>;
207 };
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