1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/sound/nvidi 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NVIDIA Tegra20 S/PDIF Controller 7 title: NVIDIA Tegra20 S/PDIF Controller
8 8
9 description: | 9 description: |
10 The S/PDIF controller supports both input an 10 The S/PDIF controller supports both input and output in serial audio
11 digital interface format. The input controll 11 digital interface format. The input controller can digitally recover
12 a clock from the received stream. The S/PDIF 12 a clock from the received stream. The S/PDIF controller is also used
13 to generate the embedded audio for HDMI outp 13 to generate the embedded audio for HDMI output channel.
14 14
15 maintainers: 15 maintainers:
16 - Thierry Reding <treding@nvidia.com> 16 - Thierry Reding <treding@nvidia.com>
17 - Jon Hunter <jonathanh@nvidia.com> 17 - Jon Hunter <jonathanh@nvidia.com>
18 18
19 allOf: <<
20 - $ref: dai-common.yaml# <<
21 <<
22 properties: 19 properties:
23 compatible: 20 compatible:
24 const: nvidia,tegra20-spdif 21 const: nvidia,tegra20-spdif
25 22
26 reg: 23 reg:
27 maxItems: 1 24 maxItems: 1
28 25
29 resets: 26 resets:
30 maxItems: 1 27 maxItems: 1
31 28
32 interrupts: 29 interrupts:
33 maxItems: 1 30 maxItems: 1
34 31
35 clocks: 32 clocks:
36 minItems: 2 33 minItems: 2
37 34
38 clock-names: 35 clock-names:
39 items: 36 items:
40 - const: out 37 - const: out
41 - const: in 38 - const: in
42 39
43 dmas: 40 dmas:
44 minItems: 2 41 minItems: 2
45 42
46 dma-names: 43 dma-names:
47 items: 44 items:
48 - const: rx 45 - const: rx
49 - const: tx 46 - const: tx
50 47
51 "#sound-dai-cells": 48 "#sound-dai-cells":
52 const: 0 49 const: 0
53 50
54 nvidia,fixed-parent-rate: 51 nvidia,fixed-parent-rate:
55 description: | 52 description: |
56 Specifies whether board prefers parent c 53 Specifies whether board prefers parent clock to stay at a fixed rate.
57 This allows multiple Tegra20 audio compo 54 This allows multiple Tegra20 audio components work simultaneously by
58 limiting number of supportable audio rat 55 limiting number of supportable audio rates.
59 type: boolean 56 type: boolean
60 57
61 required: 58 required:
62 - compatible 59 - compatible
63 - reg 60 - reg
64 - resets 61 - resets
65 - interrupts 62 - interrupts
66 - clocks 63 - clocks
67 - clock-names 64 - clock-names
68 - dmas 65 - dmas
69 - dma-names 66 - dma-names
70 - "#sound-dai-cells" 67 - "#sound-dai-cells"
71 68
72 unevaluatedProperties: false !! 69 additionalProperties: false
73 70
74 examples: 71 examples:
75 - | 72 - |
76 spdif@70002400 { 73 spdif@70002400 {
77 compatible = "nvidia,tegra20-spdif"; 74 compatible = "nvidia,tegra20-spdif";
78 reg = <0x70002400 0x200>; 75 reg = <0x70002400 0x200>;
79 interrupts = <77>; 76 interrupts = <77>;
80 clocks = <&clk 99>, <&clk 98>; 77 clocks = <&clk 99>, <&clk 98>;
81 clock-names = "out", "in"; 78 clock-names = "out", "in";
82 resets = <&rst 10>; 79 resets = <&rst 10>;
83 dmas = <&apbdma 3>, <&apbdma 3>; 80 dmas = <&apbdma 3>, <&apbdma 3>;
84 dma-names = "rx", "tx"; 81 dma-names = "rx", "tx";
85 #sound-dai-cells = <0>; 82 #sound-dai-cells = <0>;
86 }; 83 };
87 84
88 ... 85 ...
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