1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/sound/nvidi 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Tegra210 I2S Controller 7 title: Tegra210 I2S Controller
8 8
9 description: | 9 description: |
10 The Inter-IC Sound (I2S) controller implemen 10 The Inter-IC Sound (I2S) controller implements full-duplex,
11 bi-directional and single direction point-to 11 bi-directional and single direction point-to-point serial
12 interfaces. It can interface with I2S compat 12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master an 13 I2S controller can operate both in master and slave mode.
14 14
15 maintainers: 15 maintainers:
16 - Jon Hunter <jonathanh@nvidia.com> 16 - Jon Hunter <jonathanh@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com> 17 - Sameer Pujar <spujar@nvidia.com>
18 18
19 allOf: 19 allOf:
20 - $ref: dai-common.yaml# !! 20 - $ref: name-prefix.yaml#
21 21
22 properties: 22 properties:
23 $nodename: 23 $nodename:
24 pattern: "^i2s@[0-9a-f]*$" 24 pattern: "^i2s@[0-9a-f]*$"
25 25
26 compatible: 26 compatible:
27 oneOf: 27 oneOf:
28 - const: nvidia,tegra210-i2s 28 - const: nvidia,tegra210-i2s
29 - items: 29 - items:
30 - enum: 30 - enum:
31 - nvidia,tegra234-i2s 31 - nvidia,tegra234-i2s
32 - nvidia,tegra194-i2s 32 - nvidia,tegra194-i2s
33 - nvidia,tegra186-i2s 33 - nvidia,tegra186-i2s
34 - const: nvidia,tegra210-i2s 34 - const: nvidia,tegra210-i2s
35 35
36 reg: 36 reg:
37 maxItems: 1 37 maxItems: 1
38 38
39 clocks: 39 clocks:
40 minItems: 1 40 minItems: 1
41 items: 41 items:
42 - description: I2S bit clock 42 - description: I2S bit clock
43 - description: 43 - description:
44 Sync input clock, which can act as c 44 Sync input clock, which can act as clock source to other I/O
45 modules in AHUB. The Tegra I2S drive 45 modules in AHUB. The Tegra I2S driver sets this clock rate as
46 per bit clock rate. I/O module which 46 per bit clock rate. I/O module which wants to use this clock
47 as source, can mention this clock as 47 as source, can mention this clock as parent in the DT bindings.
48 This is an optional clock entry, sin 48 This is an optional clock entry, since it is only required when
49 some other I/O wants to reference fr 49 some other I/O wants to reference from a particular I2Sx
50 instance. 50 instance.
51 51
52 clock-names: 52 clock-names:
53 minItems: 1 53 minItems: 1
54 items: 54 items:
55 - const: i2s 55 - const: i2s
56 - const: sync_input 56 - const: sync_input
57 57
58 assigned-clocks: 58 assigned-clocks:
59 minItems: 1 59 minItems: 1
60 maxItems: 2 60 maxItems: 2
61 61
62 assigned-clock-parents: 62 assigned-clock-parents:
63 minItems: 1 63 minItems: 1
64 maxItems: 2 64 maxItems: 2
65 65
66 assigned-clock-rates: 66 assigned-clock-rates:
67 minItems: 1 67 minItems: 1
68 maxItems: 2 68 maxItems: 2
69 69
70 sound-name-prefix: 70 sound-name-prefix:
71 pattern: "^I2S[1-9]$" 71 pattern: "^I2S[1-9]$"
72 72
73 ports: 73 ports:
74 $ref: /schemas/graph.yaml#/properties/port 74 $ref: /schemas/graph.yaml#/properties/ports
75 properties: 75 properties:
76 port@0: 76 port@0:
77 $ref: audio-graph-port.yaml# 77 $ref: audio-graph-port.yaml#
78 unevaluatedProperties: false 78 unevaluatedProperties: false
79 description: | 79 description: |
80 I2S ACIF (Audio Client Interface) po 80 I2S ACIF (Audio Client Interface) port connected to the
81 corresponding AHUB (Audio Hub) ACIF 81 corresponding AHUB (Audio Hub) ACIF port.
82 82
83 port@1: 83 port@1:
84 $ref: audio-graph-port.yaml# 84 $ref: audio-graph-port.yaml#
85 unevaluatedProperties: false 85 unevaluatedProperties: false
86 description: | 86 description: |
87 I2S DAP (Digital Audio Port) interfa 87 I2S DAP (Digital Audio Port) interface which can be connected
88 to external audio codec for playback 88 to external audio codec for playback or capture.
89 89
90 required: 90 required:
91 - compatible 91 - compatible
92 - reg 92 - reg
93 - clocks 93 - clocks
94 - clock-names 94 - clock-names
95 - assigned-clocks 95 - assigned-clocks
96 - assigned-clock-parents 96 - assigned-clock-parents
97 97
98 additionalProperties: false 98 additionalProperties: false
99 99
100 examples: 100 examples:
101 - | 101 - |
102 #include<dt-bindings/clock/tegra210-car.h> 102 #include<dt-bindings/clock/tegra210-car.h>
103 103
104 i2s@702d1000 { 104 i2s@702d1000 {
105 compatible = "nvidia,tegra210-i2s"; 105 compatible = "nvidia,tegra210-i2s";
106 reg = <0x702d1000 0x100>; 106 reg = <0x702d1000 0x100>;
107 clocks = <&tegra_car TEGRA210_CLK_I2S0 107 clocks = <&tegra_car TEGRA210_CLK_I2S0>;
108 clock-names = "i2s"; 108 clock-names = "i2s";
109 assigned-clocks = <&tegra_car TEGRA210 109 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
110 assigned-clock-parents = <&tegra_car T 110 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
111 assigned-clock-rates = <1536000>; 111 assigned-clock-rates = <1536000>;
112 sound-name-prefix = "I2S1"; 112 sound-name-prefix = "I2S1";
113 }; 113 };
114 114
115 ... 115 ...
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