1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/sound/realt 4 $id: http://devicetree.org/schemas/sound/realtek,rt5682s.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Realtek rt5682s codec !! 7 title: Realtek rt5682s codec devicetree bindings 8 8 9 maintainers: 9 maintainers: 10 - Derek Fang <derek.fang@realtek.com> 10 - Derek Fang <derek.fang@realtek.com> 11 11 12 description: | 12 description: | 13 Rt5682s(ALC5682I-VS) is a rt5682i variant wh 13 Rt5682s(ALC5682I-VS) is a rt5682i variant which supports I2C only. 14 14 15 allOf: << 16 - $ref: dai-common.yaml# << 17 << 18 properties: 15 properties: 19 compatible: 16 compatible: 20 const: realtek,rt5682s 17 const: realtek,rt5682s 21 18 22 reg: 19 reg: 23 maxItems: 1 20 maxItems: 1 24 description: I2C address of the device. 21 description: I2C address of the device. 25 22 26 interrupts: 23 interrupts: 27 maxItems: 1 << 28 description: The CODEC's interrupt output. 24 description: The CODEC's interrupt output. 29 25 30 realtek,dmic1-data-pin: 26 realtek,dmic1-data-pin: 31 $ref: /schemas/types.yaml#/definitions/uin 27 $ref: /schemas/types.yaml#/definitions/uint32 32 enum: 28 enum: 33 - 0 # dmic1 data is not used 29 - 0 # dmic1 data is not used 34 - 1 # using GPIO2 pin as dmic1 data pin 30 - 1 # using GPIO2 pin as dmic1 data pin 35 - 2 # using GPIO5 pin as dmic1 data pin 31 - 2 # using GPIO5 pin as dmic1 data pin 36 description: | 32 description: | 37 Specify which GPIO pin be used as DMIC1 33 Specify which GPIO pin be used as DMIC1 data pin. 38 34 39 realtek,dmic1-clk-pin: 35 realtek,dmic1-clk-pin: 40 $ref: /schemas/types.yaml#/definitions/uin 36 $ref: /schemas/types.yaml#/definitions/uint32 41 enum: 37 enum: 42 - 0 # dmic1 clk is not used 38 - 0 # dmic1 clk is not used 43 - 1 # using GPIO1 pin as dmic1 clock pin 39 - 1 # using GPIO1 pin as dmic1 clock pin 44 - 2 # using GPIO3 pin as dmic1 clock pin 40 - 2 # using GPIO3 pin as dmic1 clock pin 45 description: | 41 description: | 46 Specify which GPIO pin be used as DMIC1 42 Specify which GPIO pin be used as DMIC1 clk pin. 47 43 48 realtek,jd-src: 44 realtek,jd-src: 49 $ref: /schemas/types.yaml#/definitions/uin 45 $ref: /schemas/types.yaml#/definitions/uint32 50 enum: 46 enum: 51 - 0 # No JD is used 47 - 0 # No JD is used 52 - 1 # using JD1 as JD source 48 - 1 # using JD1 as JD source 53 description: | 49 description: | 54 Specify which JD source be used. 50 Specify which JD source be used. 55 51 56 realtek,ldo1-en-gpios: 52 realtek,ldo1-en-gpios: 57 description: | 53 description: | 58 The GPIO that controls the CODEC's LDO1_ 54 The GPIO that controls the CODEC's LDO1_EN pin. 59 55 60 realtek,dmic-clk-rate-hz: 56 realtek,dmic-clk-rate-hz: 61 description: | 57 description: | 62 Set the clock rate (hz) for the requirem 58 Set the clock rate (hz) for the requirement of the particular DMIC. 63 59 64 realtek,dmic-delay-ms: 60 realtek,dmic-delay-ms: 65 description: | 61 description: | 66 Set the delay time (ms) for the requirem 62 Set the delay time (ms) for the requirement of the particular DMIC. 67 63 68 realtek,amic-delay-ms: << 69 description: | << 70 Set the delay time (ms) for the requirem << 71 << 72 realtek,dmic-clk-driving-high: 64 realtek,dmic-clk-driving-high: 73 type: boolean 65 type: boolean 74 description: | 66 description: | 75 Set the high driving of the DMIC clock o 67 Set the high driving of the DMIC clock out. 76 68 77 clocks: 69 clocks: 78 items: 70 items: 79 - description: phandle and clock specifi 71 - description: phandle and clock specifier for codec MCLK. 80 72 81 clock-names: 73 clock-names: 82 items: 74 items: 83 - const: mclk 75 - const: mclk 84 76 85 "#clock-cells": 77 "#clock-cells": 86 const: 1 78 const: 1 87 79 88 clock-output-names: 80 clock-output-names: 89 minItems: 2 81 minItems: 2 90 maxItems: 2 82 maxItems: 2 91 description: Name given for DAI word clock 83 description: Name given for DAI word clock and bit clock outputs. 92 84 93 "#sound-dai-cells": !! 85 additionalProperties: false 94 const: 1 << 95 << 96 AVDD-supply: << 97 description: Regulator supplying analog po << 98 << 99 MICVDD-supply: << 100 description: Regulator supplying power for << 101 MICVDD pin. << 102 << 103 DBVDD-supply: << 104 description: Regulator supplying I/O power << 105 << 106 LDO1-IN-supply: << 107 description: Regulator supplying power to << 108 through the LDO1_IN pin. << 109 << 110 unevaluatedProperties: false << 111 86 112 required: 87 required: 113 - compatible 88 - compatible 114 - reg 89 - reg 115 - AVDD-supply << 116 - MICVDD-supply << 117 - DBVDD-supply << 118 - LDO1-IN-supply << 119 90 120 examples: 91 examples: 121 - | 92 - | 122 #include <dt-bindings/gpio/gpio.h> !! 93 #include <dt-bindings/gpio/tegra-gpio.h> 123 #include <dt-bindings/interrupt-controller 94 #include <dt-bindings/interrupt-controller/irq.h> 124 95 125 i2c { 96 i2c { 126 #address-cells = <1>; 97 #address-cells = <1>; 127 #size-cells = <0>; 98 #size-cells = <0>; 128 99 129 codec@1a { 100 codec@1a { 130 compatible = "realtek,rt5682s"; 101 compatible = "realtek,rt5682s"; 131 reg = <0x1a>; 102 reg = <0x1a>; 132 interrupts = <6 IRQ_TYPE_LEVEL_HIG !! 103 interrupt-parent = <&gpio>; >> 104 interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_LEVEL_HIGH>; 133 realtek,ldo1-en-gpios = 105 realtek,ldo1-en-gpios = 134 <&gpio 2 GPIO_ACTIVE_HIGH>; !! 106 <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>; 135 realtek,dmic1-data-pin = <1>; 107 realtek,dmic1-data-pin = <1>; 136 realtek,dmic1-clk-pin = <1>; 108 realtek,dmic1-clk-pin = <1>; 137 realtek,jd-src = <1>; 109 realtek,jd-src = <1>; 138 110 139 #clock-cells = <1>; 111 #clock-cells = <1>; 140 clock-output-names = "rt5682-dai-w 112 clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk"; 141 113 142 clocks = <&osc>; 114 clocks = <&osc>; 143 clock-names = "mclk"; 115 clock-names = "mclk"; 144 << 145 AVDD-supply = <&avdd_reg>; << 146 MICVDD-supply = <&micvdd_reg>; << 147 DBVDD-supply = <&dbvdd_reg>; << 148 LDO1-IN-supply = <&ldo1_in_reg>; << 149 }; 116 }; 150 }; 117 };
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