1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/sound/st,st 4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: STMicroelectronics STM32 Serial Audio I 7 title: STMicroelectronics STM32 Serial Audio Interface (SAI)
8 8
9 maintainers: 9 maintainers:
10 - Olivier Moysan <olivier.moysan@foss.st.com> 10 - Olivier Moysan <olivier.moysan@foss.st.com>
11 11
12 description: 12 description:
13 The SAI interface (Serial Audio Interface) o 13 The SAI interface (Serial Audio Interface) offers a wide set of audio
14 protocols as I2S standards, LSB or MSB-justi 14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-b 15 The SAI contains two independent audio sub-blocks. Each sub-block has
16 its own clock generator and I/O lines contro 16 its own clock generator and I/O lines controller.
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - st,stm32f4-sai 21 - st,stm32f4-sai
22 - st,stm32h7-sai 22 - st,stm32h7-sai
23 23
24 reg: 24 reg:
25 items: 25 items:
26 - description: Base address and size of 26 - description: Base address and size of SAI common register set.
27 - description: Base address and size of 27 - description: Base address and size of SAI identification register set.
28 minItems: 1 28 minItems: 1
29 29
30 ranges: 30 ranges:
31 maxItems: 1 31 maxItems: 1
32 32
33 interrupts: 33 interrupts:
34 maxItems: 1 34 maxItems: 1
35 35
36 resets: 36 resets:
37 maxItems: 1 37 maxItems: 1
38 38
39 "#address-cells": 39 "#address-cells":
40 const: 1 40 const: 1
41 41
42 "#size-cells": 42 "#size-cells":
43 const: 1 43 const: 1
44 44
45 clocks: 45 clocks:
46 maxItems: 3 46 maxItems: 3
47 47
48 clock-names: 48 clock-names:
49 maxItems: 3 49 maxItems: 3
50 50
51 access-controllers: 51 access-controllers:
52 minItems: 1 52 minItems: 1
53 maxItems: 2 53 maxItems: 2
54 54
55 required: 55 required:
56 - compatible 56 - compatible
57 - reg 57 - reg
58 - ranges 58 - ranges
59 - "#address-cells" 59 - "#address-cells"
60 - "#size-cells" 60 - "#size-cells"
61 - clocks 61 - clocks
62 - clock-names 62 - clock-names
63 63
64 patternProperties: 64 patternProperties:
65 "^audio-controller@[0-9a-f]+$": 65 "^audio-controller@[0-9a-f]+$":
66 type: object 66 type: object
67 additionalProperties: false 67 additionalProperties: false
68 description: 68 description:
69 Two subnodes corresponding to SAI sub-bl 69 Two subnodes corresponding to SAI sub-block instances A et B
70 can be defined. Subnode can be omitted f 70 can be defined. Subnode can be omitted for unused sub-block.
71 71
72 properties: 72 properties:
73 compatible: 73 compatible:
74 description: Compatible for SAI sub-bl 74 description: Compatible for SAI sub-block A or B.
75 pattern: "^st,stm32-sai-sub-[ab]$" 75 pattern: "^st,stm32-sai-sub-[ab]$"
76 76
77 "#sound-dai-cells": 77 "#sound-dai-cells":
78 const: 0 78 const: 0
79 79
80 reg: 80 reg:
81 maxItems: 1 81 maxItems: 1
82 82
83 clocks: 83 clocks:
84 items: 84 items:
85 - description: sai_ck clock feeding 85 - description: sai_ck clock feeding the internal clock generator.
86 - description: MCLK clock from a SAI 86 - description: MCLK clock from a SAI set as master clock provider.
87 minItems: 1 87 minItems: 1
88 88
89 clock-names: 89 clock-names:
90 items: 90 items:
91 - const: sai_ck 91 - const: sai_ck
92 - const: MCLK 92 - const: MCLK
93 minItems: 1 93 minItems: 1
94 94
95 dmas: 95 dmas:
96 maxItems: 1 96 maxItems: 1
97 97
98 dma-names: 98 dma-names:
99 description: | 99 description: |
100 rx: SAI sub-block is configured as a 100 rx: SAI sub-block is configured as a capture DAI.
101 tx: SAI sub-block is configured as a 101 tx: SAI sub-block is configured as a playback DAI.
102 enum: [ rx, tx ] 102 enum: [ rx, tx ]
103 103
104 st,sync: 104 st,sync:
105 description: 105 description:
106 Configure the SAI sub-block as slave 106 Configure the SAI sub-block as slave of another SAI sub-block.
107 By default SAI sub-block is in async 107 By default SAI sub-block is in asynchronous mode.
108 Must contain the phandle and index o 108 Must contain the phandle and index of the SAI sub-block providing
109 the synchronization. 109 the synchronization.
110 $ref: /schemas/types.yaml#/definitions 110 $ref: /schemas/types.yaml#/definitions/phandle-array
111 items: 111 items:
112 - items: 112 - items:
113 - description: phandle of the SA 113 - description: phandle of the SAI sub-block
114 - description: index of the SAI 114 - description: index of the SAI sub-block
115 115
116 st,iec60958: 116 st,iec60958:
117 description: 117 description:
118 If set, support S/PDIF IEC6958 proto 118 If set, support S/PDIF IEC6958 protocol for playback.
119 IEC60958 protocol is not available f 119 IEC60958 protocol is not available for capture.
120 By default, custom protocol is assum 120 By default, custom protocol is assumed, meaning that protocol is
121 configured according to protocol def 121 configured according to protocol defined in related DAI link node,
122 such as i2s, left justified, right j 122 such as i2s, left justified, right justified, dsp and pdm protocols.
123 $ref: /schemas/types.yaml#/definitions 123 $ref: /schemas/types.yaml#/definitions/flag
124 124
125 "#clock-cells": 125 "#clock-cells":
126 description: Configure the SAI device 126 description: Configure the SAI device as master clock provider.
127 const: 0 127 const: 0
128 128
129 port: 129 port:
130 $ref: audio-graph-port.yaml# 130 $ref: audio-graph-port.yaml#
131 unevaluatedProperties: false 131 unevaluatedProperties: false
132 132
133 required: 133 required:
134 - compatible 134 - compatible
135 - "#sound-dai-cells" 135 - "#sound-dai-cells"
136 - reg 136 - reg
137 - clocks 137 - clocks
138 - clock-names 138 - clock-names
139 - dmas 139 - dmas
140 - dma-names 140 - dma-names
141 141
142 allOf: 142 allOf:
143 - if: 143 - if:
144 properties: 144 properties:
145 compatible: 145 compatible:
146 contains: 146 contains:
147 const: st,stm32f4-sai 147 const: st,stm32f4-sai
148 then: 148 then:
149 properties: 149 properties:
150 clocks: 150 clocks:
151 items: 151 items:
152 - description: x8k, SAI parent clo 152 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
153 - description: x11k, SAI parent cl 153 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
154 154
155 clock-names: 155 clock-names:
156 items: 156 items:
157 - const: x8k 157 - const: x8k
158 - const: x11k 158 - const: x11k
159 else: 159 else:
160 properties: 160 properties:
161 clocks: 161 clocks:
162 items: 162 items:
163 - description: pclk feeds the peri 163 - description: pclk feeds the peripheral bus interface.
164 - description: x8k, SAI parent clo 164 - description: x8k, SAI parent clock for sampling rates multiple of 8kHz.
165 - description: x11k, SAI parent cl 165 - description: x11k, SAI parent clock for sampling rates multiple of 11.025kHz.
166 166
167 clock-names: 167 clock-names:
168 items: 168 items:
169 - const: pclk 169 - const: pclk
170 - const: x8k 170 - const: x8k
171 - const: x11k 171 - const: x11k
172 172
173 additionalProperties: false 173 additionalProperties: false
174 174
175 examples: 175 examples:
176 - | 176 - |
177 #include <dt-bindings/interrupt-controller 177 #include <dt-bindings/interrupt-controller/arm-gic.h>
178 #include <dt-bindings/clock/stm32mp1-clks. 178 #include <dt-bindings/clock/stm32mp1-clks.h>
179 #include <dt-bindings/reset/stm32mp1-reset 179 #include <dt-bindings/reset/stm32mp1-resets.h>
180 sai2: sai@4400b000 { 180 sai2: sai@4400b000 {
181 compatible = "st,stm32h7-sai"; 181 compatible = "st,stm32h7-sai";
182 #address-cells = <1>; 182 #address-cells = <1>;
183 #size-cells = <1>; 183 #size-cells = <1>;
184 ranges = <0 0x4400b000 0x400>; 184 ranges = <0 0x4400b000 0x400>;
185 reg = <0x4400b000 0x4>, <0x4400b3f0 0x10 185 reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
186 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&r 186 clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
187 clock-names = "pclk", "x8k", "x11k"; 187 clock-names = "pclk", "x8k", "x11k";
188 pinctrl-names = "default", "sleep"; 188 pinctrl-names = "default", "sleep";
189 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pin 189 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
190 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai 190 pinctrl-1 = <&sai2a_sleep_pins_a>, <&sai2b_sleep_pins_b>;
191 191
192 sai2a: audio-controller@4400b004 { 192 sai2a: audio-controller@4400b004 {
193 #sound-dai-cells = <0>; 193 #sound-dai-cells = <0>;
194 compatible = "st,stm32-sai-sub-a"; 194 compatible = "st,stm32-sai-sub-a";
195 reg = <0x4 0x1c>; 195 reg = <0x4 0x1c>;
196 dmas = <&dmamux1 89 0x400 0x01>; 196 dmas = <&dmamux1 89 0x400 0x01>;
197 dma-names = "tx"; 197 dma-names = "tx";
198 clocks = <&rcc SAI2_K>; 198 clocks = <&rcc SAI2_K>;
199 clock-names = "sai_ck"; 199 clock-names = "sai_ck";
200 }; 200 };
201 }; 201 };
202 202
203 ... 203 ...
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