1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorpo <<
3 # Author: Peter Ujfalusi <peter.ujfalusi@ti.com <<
4 %YAML 1.2 2 %YAML 1.2
5 --- 3 ---
6 $id: http://devicetree.org/schemas/sound/ti,j7 4 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml#
7 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 6
9 title: Texas Instruments J721e Common Processo 7 title: Texas Instruments J721e Common Processor Board Audio Support
10 8
11 maintainers: 9 maintainers:
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> !! 10 - Peter Ujfalusi <peter.ujfalusi@ti.com>
13 11
14 description: | 12 description: |
15 The audio support on the board is using pcm3 13 The audio support on the board is using pcm3168a codec connected to McASP10
16 serializers in parallel setup. 14 serializers in parallel setup.
17 The pcm3168a SCKI clock is sourced from j721 15 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin.
18 In order to support 48KHz and 44.1KHz family 16 In order to support 48KHz and 44.1KHz family of sampling rates the parent
19 clock for AUDIO_REFCLK2 needs to be changed 17 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and
20 PLL15 (for 44.1KHz). The same PLLs are used 18 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
21 different HSDIVIDER. 19 different HSDIVIDER.
22 20
23 Clocking setup for j721e: 21 Clocking setup for j721e:
24 48KHz family: 22 48KHz family:
25 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK 23 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
26 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 24 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
27 25
28 44.1KHz family: 26 44.1KHz family:
29 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCL 27 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
30 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 28 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
31 29
32 Clocking setup for j7200: 30 Clocking setup for j7200:
33 48KHz family: 31 48KHz family:
34 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK - 32 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
35 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 33 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
36 34
37 properties: 35 properties:
38 compatible: 36 compatible:
39 enum: 37 enum:
40 - ti,j721e-cpb-audio 38 - ti,j721e-cpb-audio
41 - ti,j7200-cpb-audio 39 - ti,j7200-cpb-audio
42 40
43 model: 41 model:
44 $ref: /schemas/types.yaml#/definitions/str 42 $ref: /schemas/types.yaml#/definitions/string
45 description: User specified audio sound ca 43 description: User specified audio sound card name
46 44
47 ti,cpb-mcasp: 45 ti,cpb-mcasp:
48 description: phandle to McASP used on CPB 46 description: phandle to McASP used on CPB
49 $ref: /schemas/types.yaml#/definitions/pha 47 $ref: /schemas/types.yaml#/definitions/phandle
50 48
51 ti,cpb-codec: 49 ti,cpb-codec:
52 description: phandle to the pcm3168a codec 50 description: phandle to the pcm3168a codec used on the CPB
53 $ref: /schemas/types.yaml#/definitions/pha 51 $ref: /schemas/types.yaml#/definitions/phandle
54 52
55 clocks: 53 clocks:
56 minItems: 4 54 minItems: 4
57 maxItems: 6 55 maxItems: 6
58 56
59 clock-names: 57 clock-names:
60 minItems: 4 58 minItems: 4
61 maxItems: 6 59 maxItems: 6
62 60
63 required: 61 required:
64 - compatible 62 - compatible
65 - model 63 - model
66 - ti,cpb-mcasp 64 - ti,cpb-mcasp
67 - ti,cpb-codec 65 - ti,cpb-codec
68 - clocks 66 - clocks
69 - clock-names 67 - clock-names
70 68
71 additionalProperties: false 69 additionalProperties: false
72 70
73 allOf: 71 allOf:
74 - if: 72 - if:
75 properties: 73 properties:
76 compatible: 74 compatible:
77 contains: 75 contains:
78 const: ti,j721e-cpb-audio 76 const: ti,j721e-cpb-audio
79 77
80 then: 78 then:
81 properties: 79 properties:
82 clocks: 80 clocks:
>> 81 minItems: 6
83 items: 82 items:
84 - description: AUXCLK clock for Mc 83 - description: AUXCLK clock for McASP used by CPB audio
85 - description: Parent for CPB_McAS 84 - description: Parent for CPB_McASP auxclk (for 48KHz)
86 - description: Parent for CPB_McAS 85 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
87 - description: SCKI clock for the 86 - description: SCKI clock for the pcm3168a codec on CPB
88 - description: Parent for CPB_SCKI 87 - description: Parent for CPB_SCKI clock (for 48KHz)
89 - description: Parent for CPB_SCKI 88 - description: Parent for CPB_SCKI clock (for 44.1KHz)
90 89
91 clock-names: 90 clock-names:
92 items: 91 items:
93 - const: cpb-mcasp-auxclk 92 - const: cpb-mcasp-auxclk
94 - const: cpb-mcasp-auxclk-48000 93 - const: cpb-mcasp-auxclk-48000
95 - const: cpb-mcasp-auxclk-44100 94 - const: cpb-mcasp-auxclk-44100
96 - const: cpb-codec-scki 95 - const: cpb-codec-scki
97 - const: cpb-codec-scki-48000 96 - const: cpb-codec-scki-48000
98 - const: cpb-codec-scki-44100 97 - const: cpb-codec-scki-44100
99 98
100 - if: 99 - if:
101 properties: 100 properties:
102 compatible: 101 compatible:
103 contains: 102 contains:
104 const: ti,j7200-cpb-audio 103 const: ti,j7200-cpb-audio
105 104
106 then: 105 then:
107 properties: 106 properties:
108 clocks: 107 clocks:
>> 108 maxItems: 4
109 items: 109 items:
110 - description: AUXCLK clock for Mc 110 - description: AUXCLK clock for McASP used by CPB audio
111 - description: Parent for CPB_McAS 111 - description: Parent for CPB_McASP auxclk (for 48KHz)
112 - description: SCKI clock for the 112 - description: SCKI clock for the pcm3168a codec on CPB
113 - description: Parent for CPB_SCKI 113 - description: Parent for CPB_SCKI clock (for 48KHz)
114 114
115 clock-names: 115 clock-names:
116 items: 116 items:
117 - const: cpb-mcasp-auxclk 117 - const: cpb-mcasp-auxclk
118 - const: cpb-mcasp-auxclk-48000 118 - const: cpb-mcasp-auxclk-48000
119 - const: cpb-codec-scki 119 - const: cpb-codec-scki
120 - const: cpb-codec-scki-48000 120 - const: cpb-codec-scki-48000
121 121
122 examples: 122 examples:
123 - |+ 123 - |+
124 sound { 124 sound {
125 compatible = "ti,j721e-cpb-audio"; 125 compatible = "ti,j721e-cpb-audio";
126 model = "j721e-cpb"; 126 model = "j721e-cpb";
>> 127
>> 128 status = "okay";
127 129
128 ti,cpb-mcasp = <&mcasp10>; 130 ti,cpb-mcasp = <&mcasp10>;
129 ti,cpb-codec = <&pcm3168a_1>; 131 ti,cpb-codec = <&pcm3168a_1>;
130 132
131 clocks = <&k3_clks 184 1>, 133 clocks = <&k3_clks 184 1>,
132 <&k3_clks 184 2>, <&k3_clks 1 134 <&k3_clks 184 2>, <&k3_clks 184 4>,
133 <&k3_clks 157 371>, 135 <&k3_clks 157 371>,
134 <&k3_clks 157 400>, <&k3_clks 136 <&k3_clks 157 400>, <&k3_clks 157 401>;
135 clock-names = "cpb-mcasp-auxclk", 137 clock-names = "cpb-mcasp-auxclk",
136 "cpb-mcasp-auxclk-48000" 138 "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",
137 "cpb-codec-scki", 139 "cpb-codec-scki",
138 "cpb-codec-scki-48000", 140 "cpb-codec-scki-48000", "cpb-codec-scki-44100";
139 }; 141 };
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