1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorpo 2 # Copyright (C) 2020 Texas Instruments Incorporated 3 # Author: Peter Ujfalusi <peter.ujfalusi@ti.com 3 # Author: Peter Ujfalusi <peter.ujfalusi@ti.com> 4 %YAML 1.2 4 %YAML 1.2 5 --- 5 --- 6 $id: http://devicetree.org/schemas/sound/ti,j7 6 $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml# 7 $schema: http://devicetree.org/meta-schemas/co 7 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 8 9 title: Texas Instruments J721e Common Processo 9 title: Texas Instruments J721e Common Processor Board Audio Support 10 10 11 maintainers: 11 maintainers: 12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> 12 - Peter Ujfalusi <peter.ujfalusi@gmail.com> 13 13 14 description: | 14 description: | 15 The audio support on the board is using pcm3 15 The audio support on the board is using pcm3168a codec connected to McASP10 16 serializers in parallel setup. 16 serializers in parallel setup. 17 The pcm3168a SCKI clock is sourced from j721 17 The pcm3168a SCKI clock is sourced from j721e AUDIO_REFCLK2 pin. 18 In order to support 48KHz and 44.1KHz family 18 In order to support 48KHz and 44.1KHz family of sampling rates the parent 19 clock for AUDIO_REFCLK2 needs to be changed 19 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and 20 PLL15 (for 44.1KHz). The same PLLs are used 20 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via 21 different HSDIVIDER. 21 different HSDIVIDER. 22 22 23 Clocking setup for j721e: 23 Clocking setup for j721e: 24 48KHz family: 24 48KHz family: 25 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK 25 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk 26 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 26 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI 27 27 28 44.1KHz family: 28 44.1KHz family: 29 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCL 29 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk 30 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 30 |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI 31 31 32 Clocking setup for j7200: 32 Clocking setup for j7200: 33 48KHz family: 33 48KHz family: 34 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK - 34 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk 35 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 35 |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI 36 36 37 properties: 37 properties: 38 compatible: 38 compatible: 39 enum: 39 enum: 40 - ti,j721e-cpb-audio 40 - ti,j721e-cpb-audio 41 - ti,j7200-cpb-audio 41 - ti,j7200-cpb-audio 42 42 43 model: 43 model: 44 $ref: /schemas/types.yaml#/definitions/str 44 $ref: /schemas/types.yaml#/definitions/string 45 description: User specified audio sound ca 45 description: User specified audio sound card name 46 46 47 ti,cpb-mcasp: 47 ti,cpb-mcasp: 48 description: phandle to McASP used on CPB 48 description: phandle to McASP used on CPB 49 $ref: /schemas/types.yaml#/definitions/pha 49 $ref: /schemas/types.yaml#/definitions/phandle 50 50 51 ti,cpb-codec: 51 ti,cpb-codec: 52 description: phandle to the pcm3168a codec 52 description: phandle to the pcm3168a codec used on the CPB 53 $ref: /schemas/types.yaml#/definitions/pha 53 $ref: /schemas/types.yaml#/definitions/phandle 54 54 55 clocks: 55 clocks: 56 minItems: 4 56 minItems: 4 57 maxItems: 6 57 maxItems: 6 58 58 59 clock-names: 59 clock-names: 60 minItems: 4 60 minItems: 4 61 maxItems: 6 61 maxItems: 6 62 62 63 required: 63 required: 64 - compatible 64 - compatible 65 - model 65 - model 66 - ti,cpb-mcasp 66 - ti,cpb-mcasp 67 - ti,cpb-codec 67 - ti,cpb-codec 68 - clocks 68 - clocks 69 - clock-names 69 - clock-names 70 70 71 additionalProperties: false 71 additionalProperties: false 72 72 73 allOf: 73 allOf: 74 - if: 74 - if: 75 properties: 75 properties: 76 compatible: 76 compatible: 77 contains: 77 contains: 78 const: ti,j721e-cpb-audio 78 const: ti,j721e-cpb-audio 79 79 80 then: 80 then: 81 properties: 81 properties: 82 clocks: 82 clocks: 83 items: 83 items: 84 - description: AUXCLK clock for Mc 84 - description: AUXCLK clock for McASP used by CPB audio 85 - description: Parent for CPB_McAS 85 - description: Parent for CPB_McASP auxclk (for 48KHz) 86 - description: Parent for CPB_McAS 86 - description: Parent for CPB_McASP auxclk (for 44.1KHz) 87 - description: SCKI clock for the 87 - description: SCKI clock for the pcm3168a codec on CPB 88 - description: Parent for CPB_SCKI 88 - description: Parent for CPB_SCKI clock (for 48KHz) 89 - description: Parent for CPB_SCKI 89 - description: Parent for CPB_SCKI clock (for 44.1KHz) 90 90 91 clock-names: 91 clock-names: 92 items: 92 items: 93 - const: cpb-mcasp-auxclk 93 - const: cpb-mcasp-auxclk 94 - const: cpb-mcasp-auxclk-48000 94 - const: cpb-mcasp-auxclk-48000 95 - const: cpb-mcasp-auxclk-44100 95 - const: cpb-mcasp-auxclk-44100 96 - const: cpb-codec-scki 96 - const: cpb-codec-scki 97 - const: cpb-codec-scki-48000 97 - const: cpb-codec-scki-48000 98 - const: cpb-codec-scki-44100 98 - const: cpb-codec-scki-44100 99 99 100 - if: 100 - if: 101 properties: 101 properties: 102 compatible: 102 compatible: 103 contains: 103 contains: 104 const: ti,j7200-cpb-audio 104 const: ti,j7200-cpb-audio 105 105 106 then: 106 then: 107 properties: 107 properties: 108 clocks: 108 clocks: 109 items: 109 items: 110 - description: AUXCLK clock for Mc 110 - description: AUXCLK clock for McASP used by CPB audio 111 - description: Parent for CPB_McAS 111 - description: Parent for CPB_McASP auxclk (for 48KHz) 112 - description: SCKI clock for the 112 - description: SCKI clock for the pcm3168a codec on CPB 113 - description: Parent for CPB_SCKI 113 - description: Parent for CPB_SCKI clock (for 48KHz) 114 114 115 clock-names: 115 clock-names: 116 items: 116 items: 117 - const: cpb-mcasp-auxclk 117 - const: cpb-mcasp-auxclk 118 - const: cpb-mcasp-auxclk-48000 118 - const: cpb-mcasp-auxclk-48000 119 - const: cpb-codec-scki 119 - const: cpb-codec-scki 120 - const: cpb-codec-scki-48000 120 - const: cpb-codec-scki-48000 121 121 122 examples: 122 examples: 123 - |+ 123 - |+ 124 sound { 124 sound { 125 compatible = "ti,j721e-cpb-audio"; 125 compatible = "ti,j721e-cpb-audio"; 126 model = "j721e-cpb"; 126 model = "j721e-cpb"; 127 127 128 ti,cpb-mcasp = <&mcasp10>; 128 ti,cpb-mcasp = <&mcasp10>; 129 ti,cpb-codec = <&pcm3168a_1>; 129 ti,cpb-codec = <&pcm3168a_1>; 130 130 131 clocks = <&k3_clks 184 1>, 131 clocks = <&k3_clks 184 1>, 132 <&k3_clks 184 2>, <&k3_clks 1 132 <&k3_clks 184 2>, <&k3_clks 184 4>, 133 <&k3_clks 157 371>, 133 <&k3_clks 157 371>, 134 <&k3_clks 157 400>, <&k3_clks 134 <&k3_clks 157 400>, <&k3_clks 157 401>; 135 clock-names = "cpb-mcasp-auxclk", 135 clock-names = "cpb-mcasp-auxclk", 136 "cpb-mcasp-auxclk-48000" 136 "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100", 137 "cpb-codec-scki", 137 "cpb-codec-scki", 138 "cpb-codec-scki-48000", 138 "cpb-codec-scki-48000", "cpb-codec-scki-44100"; 139 }; 139 };
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