1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/spi/allwinn 4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Allwinner A31 SPI Controller !! 7 title: Allwinner A31 SPI Controller Device Tree Bindings
8 8
9 allOf: 9 allOf:
10 - $ref: spi-controller.yaml !! 10 - $ref: "spi-controller.yaml"
11 11
12 maintainers: 12 maintainers:
13 - Chen-Yu Tsai <wens@csie.org> 13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org> 14 - Maxime Ripard <mripard@kernel.org>
15 15
16 properties: 16 properties:
>> 17 "#address-cells": true
>> 18 "#size-cells": true
>> 19
17 compatible: 20 compatible:
18 oneOf: !! 21 enum:
19 - const: allwinner,sun50i-r329-spi !! 22 - allwinner,sun6i-a31-spi
20 - const: allwinner,sun6i-a31-spi !! 23 - allwinner,sun8i-h3-spi
21 - const: allwinner,sun8i-h3-spi <<
22 - items: <<
23 - enum: <<
24 - allwinner,sun8i-r40-spi <<
25 - allwinner,sun50i-h6-spi <<
26 - allwinner,sun50i-h616-spi <<
27 - allwinner,suniv-f1c100s-spi <<
28 - const: allwinner,sun8i-h3-spi <<
29 - items: <<
30 - enum: <<
31 - allwinner,sun20i-d1-spi <<
32 - allwinner,sun50i-r329-spi-dbi <<
33 - const: allwinner,sun50i-r329-spi <<
34 - items: <<
35 - const: allwinner,sun20i-d1-spi-dbi <<
36 - const: allwinner,sun50i-r329-spi-d <<
37 - const: allwinner,sun50i-r329-spi <<
38 24
39 reg: 25 reg:
40 maxItems: 1 26 maxItems: 1
41 27
42 interrupts: 28 interrupts:
43 maxItems: 1 29 maxItems: 1
44 30
45 clocks: 31 clocks:
46 items: 32 items:
47 - description: Bus Clock 33 - description: Bus Clock
48 - description: Module Clock 34 - description: Module Clock
49 35
50 clock-names: 36 clock-names:
51 items: 37 items:
52 - const: ahb 38 - const: ahb
53 - const: mod 39 - const: mod
54 40
55 resets: 41 resets:
56 maxItems: 1 42 maxItems: 1
57 43
58 dmas: 44 dmas:
59 items: 45 items:
60 - description: RX DMA Channel 46 - description: RX DMA Channel
61 - description: TX DMA Channel 47 - description: TX DMA Channel
62 48
63 dma-names: 49 dma-names:
64 items: 50 items:
65 - const: rx 51 - const: rx
66 - const: tx 52 - const: tx
67 53
>> 54 num-cs: true
>> 55
68 patternProperties: 56 patternProperties:
69 "^.*@[0-9a-f]+": 57 "^.*@[0-9a-f]+":
70 type: object 58 type: object
71 additionalProperties: true <<
72 <<
73 properties: 59 properties:
74 reg: 60 reg:
75 items: 61 items:
76 minimum: 0 62 minimum: 0
77 maximum: 4 63 maximum: 4
78 64
79 spi-rx-bus-width: 65 spi-rx-bus-width:
80 const: 1 66 const: 1
81 67
82 spi-tx-bus-width: 68 spi-tx-bus-width:
83 const: 1 69 const: 1
84 70
85 required: 71 required:
86 - compatible 72 - compatible
87 - reg 73 - reg
88 - interrupts 74 - interrupts
89 - clocks 75 - clocks
90 - clock-names 76 - clock-names
91 77
92 unevaluatedProperties: false !! 78 additionalProperties: false
93 79
94 examples: 80 examples:
95 - | 81 - |
96 spi1: spi@1c69000 { 82 spi1: spi@1c69000 {
97 compatible = "allwinner,sun6i-a31-spi" 83 compatible = "allwinner,sun6i-a31-spi";
98 reg = <0x01c69000 0x1000>; 84 reg = <0x01c69000 0x1000>;
99 interrupts = <0 66 4>; 85 interrupts = <0 66 4>;
100 clocks = <&ahb1_gates 21>, <&spi1_clk> 86 clocks = <&ahb1_gates 21>, <&spi1_clk>;
101 clock-names = "ahb", "mod"; 87 clock-names = "ahb", "mod";
102 resets = <&ahb1_rst 21>; 88 resets = <&ahb1_rst 21>;
103 #address-cells = <1>; 89 #address-cells = <1>;
104 #size-cells = <0>; 90 #size-cells = <0>;
105 }; 91 };
106 92
107 - | 93 - |
108 spi0: spi@1c68000 { 94 spi0: spi@1c68000 {
109 compatible = "allwinner,sun8i-h3-spi"; 95 compatible = "allwinner,sun8i-h3-spi";
110 reg = <0x01c68000 0x1000>; 96 reg = <0x01c68000 0x1000>;
111 interrupts = <0 65 4>; 97 interrupts = <0 65 4>;
112 clocks = <&ccu 30>, <&ccu 82>; 98 clocks = <&ccu 30>, <&ccu 82>;
113 clock-names = "ahb", "mod"; 99 clock-names = "ahb", "mod";
114 dmas = <&dma 23>, <&dma 23>; 100 dmas = <&dma 23>, <&dma 23>;
115 dma-names = "rx", "tx"; 101 dma-names = "rx", "tx";
116 resets = <&ccu 15>; 102 resets = <&ccu 15>;
117 #address-cells = <1>; 103 #address-cells = <1>;
118 #size-cells = <0>; 104 #size-cells = <0>;
119 }; 105 };
120 106
121 ... 107 ...
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