1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/spi/allwinn 4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Allwinner A31 SPI Controller 7 title: Allwinner A31 SPI Controller
8 8
9 allOf: 9 allOf:
10 - $ref: spi-controller.yaml 10 - $ref: spi-controller.yaml
11 11
12 maintainers: 12 maintainers:
13 - Chen-Yu Tsai <wens@csie.org> 13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org> 14 - Maxime Ripard <mripard@kernel.org>
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: 18 oneOf:
19 - const: allwinner,sun50i-r329-spi 19 - const: allwinner,sun50i-r329-spi
20 - const: allwinner,sun6i-a31-spi 20 - const: allwinner,sun6i-a31-spi
21 - const: allwinner,sun8i-h3-spi 21 - const: allwinner,sun8i-h3-spi
22 - items: 22 - items:
23 - enum: 23 - enum:
24 - allwinner,sun8i-r40-spi 24 - allwinner,sun8i-r40-spi
25 - allwinner,sun50i-h6-spi 25 - allwinner,sun50i-h6-spi
26 - allwinner,sun50i-h616-spi 26 - allwinner,sun50i-h616-spi
27 - allwinner,suniv-f1c100s-spi 27 - allwinner,suniv-f1c100s-spi
28 - const: allwinner,sun8i-h3-spi 28 - const: allwinner,sun8i-h3-spi
29 - items: 29 - items:
30 - enum: 30 - enum:
31 - allwinner,sun20i-d1-spi 31 - allwinner,sun20i-d1-spi
32 - allwinner,sun50i-r329-spi-dbi 32 - allwinner,sun50i-r329-spi-dbi
33 - const: allwinner,sun50i-r329-spi 33 - const: allwinner,sun50i-r329-spi
34 - items: 34 - items:
35 - const: allwinner,sun20i-d1-spi-dbi 35 - const: allwinner,sun20i-d1-spi-dbi
36 - const: allwinner,sun50i-r329-spi-d 36 - const: allwinner,sun50i-r329-spi-dbi
37 - const: allwinner,sun50i-r329-spi 37 - const: allwinner,sun50i-r329-spi
38 38
39 reg: 39 reg:
40 maxItems: 1 40 maxItems: 1
41 41
42 interrupts: 42 interrupts:
43 maxItems: 1 43 maxItems: 1
44 44
45 clocks: 45 clocks:
46 items: 46 items:
47 - description: Bus Clock 47 - description: Bus Clock
48 - description: Module Clock 48 - description: Module Clock
49 49
50 clock-names: 50 clock-names:
51 items: 51 items:
52 - const: ahb 52 - const: ahb
53 - const: mod 53 - const: mod
54 54
55 resets: 55 resets:
56 maxItems: 1 56 maxItems: 1
57 57
58 dmas: 58 dmas:
59 items: 59 items:
60 - description: RX DMA Channel 60 - description: RX DMA Channel
61 - description: TX DMA Channel 61 - description: TX DMA Channel
62 62
63 dma-names: 63 dma-names:
64 items: 64 items:
65 - const: rx 65 - const: rx
66 - const: tx 66 - const: tx
67 67
68 patternProperties: 68 patternProperties:
69 "^.*@[0-9a-f]+": 69 "^.*@[0-9a-f]+":
70 type: object 70 type: object
71 additionalProperties: true 71 additionalProperties: true
72 72
73 properties: 73 properties:
74 reg: 74 reg:
75 items: 75 items:
76 minimum: 0 76 minimum: 0
77 maximum: 4 77 maximum: 4
78 78
79 spi-rx-bus-width: 79 spi-rx-bus-width:
80 const: 1 80 const: 1
81 81
82 spi-tx-bus-width: 82 spi-tx-bus-width:
83 const: 1 83 const: 1
84 84
85 required: 85 required:
86 - compatible 86 - compatible
87 - reg 87 - reg
88 - interrupts 88 - interrupts
89 - clocks 89 - clocks
90 - clock-names 90 - clock-names
91 91
92 unevaluatedProperties: false 92 unevaluatedProperties: false
93 93
94 examples: 94 examples:
95 - | 95 - |
96 spi1: spi@1c69000 { 96 spi1: spi@1c69000 {
97 compatible = "allwinner,sun6i-a31-spi" 97 compatible = "allwinner,sun6i-a31-spi";
98 reg = <0x01c69000 0x1000>; 98 reg = <0x01c69000 0x1000>;
99 interrupts = <0 66 4>; 99 interrupts = <0 66 4>;
100 clocks = <&ahb1_gates 21>, <&spi1_clk> 100 clocks = <&ahb1_gates 21>, <&spi1_clk>;
101 clock-names = "ahb", "mod"; 101 clock-names = "ahb", "mod";
102 resets = <&ahb1_rst 21>; 102 resets = <&ahb1_rst 21>;
103 #address-cells = <1>; 103 #address-cells = <1>;
104 #size-cells = <0>; 104 #size-cells = <0>;
105 }; 105 };
106 106
107 - | 107 - |
108 spi0: spi@1c68000 { 108 spi0: spi@1c68000 {
109 compatible = "allwinner,sun8i-h3-spi"; 109 compatible = "allwinner,sun8i-h3-spi";
110 reg = <0x01c68000 0x1000>; 110 reg = <0x01c68000 0x1000>;
111 interrupts = <0 65 4>; 111 interrupts = <0 65 4>;
112 clocks = <&ccu 30>, <&ccu 82>; 112 clocks = <&ccu 30>, <&ccu 82>;
113 clock-names = "ahb", "mod"; 113 clock-names = "ahb", "mod";
114 dmas = <&dma 23>, <&dma 23>; 114 dmas = <&dma 23>, <&dma 23>;
115 dma-names = "rx", "tx"; 115 dma-names = "rx", "tx";
116 resets = <&ccu 15>; 116 resets = <&ccu 15>;
117 #address-cells = <1>; 117 #address-cells = <1>;
118 #size-cells = <0>; 118 #size-cells = <0>;
119 }; 119 };
120 120
121 ... 121 ...
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