1 * ICP DAS LP-8841 SPI Controller for RTC 1 * ICP DAS LP-8841 SPI Controller for RTC
2 2
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is 3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master d 4 memory register, which acts as an SPI master device.
5 5
6 The device uses the standard MicroWire half-du 6 The device uses the standard MicroWire half-duplex transfer timing.
7 Master output is set on low clock and sensed b 7 Master output is set on low clock and sensed by the RTC on the rising
8 edge. Master input is set by the RTC on the tr 8 edge. Master input is set by the RTC on the trailing edge and is sensed
9 by the master on low clock. 9 by the master on low clock.
10 10
11 Required properties: 11 Required properties:
12 12
13 - #address-cells: should be 1 13 - #address-cells: should be 1
14 14
15 - #size-cells: should be 0 15 - #size-cells: should be 0
16 16
17 - compatible: should be "icpdas,lp8841-spi-rtc 17 - compatible: should be "icpdas,lp8841-spi-rtc"
18 18
19 - reg: should provide IO memory address 19 - reg: should provide IO memory address
20 20
21 Requirements to SPI slave nodes: 21 Requirements to SPI slave nodes:
22 22
23 - There can be only one slave device. 23 - There can be only one slave device.
24 24
25 - The spi slave node should claim the followin 25 - The spi slave node should claim the following flags which are
26 required by the spi controller. 26 required by the spi controller.
27 27
28 - spi-3wire: The master itself has only 3 wi 28 - spi-3wire: The master itself has only 3 wire. It cannor work in
29 full duplex mode. 29 full duplex mode.
30 30
31 - spi-cs-high: DS-1302 has active high chip 31 - spi-cs-high: DS-1302 has active high chip select line. The master
32 doesn't support active low. 32 doesn't support active low.
33 33
34 - spi-lsb-first: DS-1302 requires least sign 34 - spi-lsb-first: DS-1302 requires least significant bit first
35 transfers. The master only support this ty 35 transfers. The master only support this type of bit ordering.
36 36
37 37
38 Example: 38 Example:
39 39
40 spi@901c { 40 spi@901c {
41 #address-cells = <1>; 41 #address-cells = <1>;
42 #size-cells = <0>; 42 #size-cells = <0>;
43 compatible = "icpdas,lp8841-spi-rtc"; 43 compatible = "icpdas,lp8841-spi-rtc";
44 reg = <0x901c 0x1>; 44 reg = <0x901c 0x1>;
45 45
46 rtc@0 { 46 rtc@0 {
47 compatible = "maxim,ds1302"; 47 compatible = "maxim,ds1302";
48 reg = <0>; 48 reg = <0>;
49 spi-max-frequency = <500000>; 49 spi-max-frequency = <500000>;
50 spi-3wire; 50 spi-3wire;
51 spi-lsb-first; 51 spi-lsb-first;
52 spi-cs-high; 52 spi-cs-high;
53 }; 53 };
54 }; 54 };
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