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Linux/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt

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Diff markup

Differences between /Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt (Version linux-5.3.18)


  1 Nuvoton NPCM Peripheral Serial Peripheral Inte      1 Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver
  2                                                     2 
  3 Nuvoton NPCM7xx SOC support two PSPI channels.      3 Nuvoton NPCM7xx SOC support two PSPI channels.
  4                                                     4 
  5 Required properties:                                5 Required properties:
  6  - compatible : "nuvoton,npcm750-pspi" for Pol !!   6  - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC
  7                                 "nuvoton,npcm8 << 
  8  - #address-cells : should be 1. see spi-bus.t      7  - #address-cells : should be 1. see spi-bus.txt
  9  - #size-cells : should be 0. see spi-bus.txt       8  - #size-cells : should be 0. see spi-bus.txt
 10  - specifies physical base address and size of      9  - specifies physical base address and size of the register.
 11  - interrupts : contain PSPI interrupt.            10  - interrupts : contain PSPI interrupt.
 12  - clocks : phandle of PSPI reference clock.       11  - clocks : phandle of PSPI reference clock.
 13  - clock-names: Should be "clk_apb5".              12  - clock-names: Should be "clk_apb5".
 14  - pinctrl-names : a pinctrl state named "defa     13  - pinctrl-names : a pinctrl state named "default" must be defined.
 15  - pinctrl-0 : phandle referencing pin configu     14  - pinctrl-0 : phandle referencing pin configuration of the device.
 16  - resets : phandle to the reset control for t << 
 17  - cs-gpios: Specifies the gpio pins to be use     15  - cs-gpios: Specifies the gpio pins to be used for chipselects.
 18             See: Documentation/devicetree/bind     16             See: Documentation/devicetree/bindings/spi/spi-bus.txt
 19                                                    17 
 20 Optional properties:                               18 Optional properties:
 21 - clock-frequency : Input clock frequency to t     19 - clock-frequency : Input clock frequency to the PSPI block in Hz.
 22                     Default is 25000000 Hz.        20                     Default is 25000000 Hz.
 23                                                    21 
                                                   >>  22 Aliases:
                                                   >>  23 - All the SPI controller nodes should be represented in the aliases node using
                                                   >>  24   the following format 'spi{n}' withe the correct numbered in "aliases" node.
                                                   >>  25 
                                                   >>  26 Example:
                                                   >>  27 
                                                   >>  28 aliases {
                                                   >>  29         spi0 = &spi0;
                                                   >>  30 };
                                                   >>  31 
 24 spi0: spi@f0200000 {                               32 spi0: spi@f0200000 {
 25         compatible = "nuvoton,npcm750-pspi";       33         compatible = "nuvoton,npcm750-pspi";
 26         reg = <0xf0200000 0x1000>;                 34         reg = <0xf0200000 0x1000>;
 27         pinctrl-names = "default";                 35         pinctrl-names = "default";
 28         pinctrl-0 = <&pspi1_pins>;                 36         pinctrl-0 = <&pspi1_pins>;
 29         #address-cells = <1>;                      37         #address-cells = <1>;
 30         #size-cells = <0>;                         38         #size-cells = <0>;
 31         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVE     39         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 32         clocks = <&clk NPCM7XX_CLK_APB5>;          40         clocks = <&clk NPCM7XX_CLK_APB5>;
 33         clock-names = "clk_apb5";                  41         clock-names = "clk_apb5";
 34         resets = <&rstc NPCM7XX_RESET_IPSRST2  << 
 35         cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>     42         cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
 36 };                                                 43 };
                                                      

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