1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/thermal/med 4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek SoC Low Voltage Thermal Sensor 7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
8 8
9 maintainers: 9 maintainers:
10 - Balsam CHIHI <bchihi@baylibre.com> 10 - Balsam CHIHI <bchihi@baylibre.com>
11 11
12 description: | 12 description: |
13 LVTS is a thermal management architecture co 13 LVTS is a thermal management architecture composed of three subsystems,
14 a Sensing device - Thermal Sensing Micro Cir 14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15 a Converter - Low Voltage Thermal Sensor con 15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and
16 a Digital controller (LVTS_CTRL). 16 a Digital controller (LVTS_CTRL).
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - mediatek,mt7988-lvts-ap <<
22 - mediatek,mt8186-lvts <<
23 - mediatek,mt8188-lvts-ap <<
24 - mediatek,mt8188-lvts-mcu <<
25 - mediatek,mt8192-lvts-ap 21 - mediatek,mt8192-lvts-ap
26 - mediatek,mt8192-lvts-mcu 22 - mediatek,mt8192-lvts-mcu
27 - mediatek,mt8195-lvts-ap 23 - mediatek,mt8195-lvts-ap
28 - mediatek,mt8195-lvts-mcu 24 - mediatek,mt8195-lvts-mcu
29 25
30 reg: 26 reg:
31 maxItems: 1 27 maxItems: 1
32 28
33 interrupts: 29 interrupts:
34 maxItems: 1 30 maxItems: 1
35 31
36 clocks: 32 clocks:
37 maxItems: 1 33 maxItems: 1
38 34
39 resets: 35 resets:
40 maxItems: 1 36 maxItems: 1
41 description: LVTS reset for clearing tempo 37 description: LVTS reset for clearing temporary data on AP/MCU.
42 38
43 nvmem-cells: 39 nvmem-cells:
44 minItems: 1 40 minItems: 1
45 items: 41 items:
46 - description: Calibration eFuse data 1 42 - description: Calibration eFuse data 1 for LVTS
47 - description: Calibration eFuse data 2 43 - description: Calibration eFuse data 2 for LVTS
48 44
49 nvmem-cell-names: 45 nvmem-cell-names:
50 minItems: 1 46 minItems: 1
51 items: 47 items:
52 - const: lvts-calib-data-1 48 - const: lvts-calib-data-1
53 - const: lvts-calib-data-2 49 - const: lvts-calib-data-2
54 50
55 "#thermal-sensor-cells": 51 "#thermal-sensor-cells":
56 const: 1 52 const: 1
57 53
58 allOf: 54 allOf:
59 - $ref: thermal-sensor.yaml# 55 - $ref: thermal-sensor.yaml#
60 56
61 - if: 57 - if:
62 properties: 58 properties:
63 compatible: 59 compatible:
64 contains: 60 contains:
65 enum: 61 enum:
66 - mediatek,mt8188-lvts-ap <<
67 - mediatek,mt8188-lvts-mcu <<
68 - mediatek,mt8192-lvts-ap 62 - mediatek,mt8192-lvts-ap
69 - mediatek,mt8192-lvts-mcu 63 - mediatek,mt8192-lvts-mcu
70 then: 64 then:
71 properties: 65 properties:
72 nvmem-cells: 66 nvmem-cells:
73 maxItems: 1 67 maxItems: 1
74 68
75 nvmem-cell-names: 69 nvmem-cell-names:
76 maxItems: 1 70 maxItems: 1
77 71
78 - if: 72 - if:
79 properties: 73 properties:
80 compatible: 74 compatible:
81 contains: 75 contains:
82 enum: 76 enum:
83 - mediatek,mt8186-lvts <<
84 - mediatek,mt8195-lvts-ap 77 - mediatek,mt8195-lvts-ap
85 - mediatek,mt8195-lvts-mcu 78 - mediatek,mt8195-lvts-mcu
86 then: 79 then:
87 properties: 80 properties:
88 nvmem-cells: 81 nvmem-cells:
89 minItems: 2 82 minItems: 2
90 83
91 nvmem-cell-names: 84 nvmem-cell-names:
92 minItems: 2 85 minItems: 2
93 86
94 required: 87 required:
95 - compatible 88 - compatible
96 - reg 89 - reg
97 - interrupts 90 - interrupts
98 - clocks 91 - clocks
99 - resets 92 - resets
100 - nvmem-cells 93 - nvmem-cells
101 - nvmem-cell-names 94 - nvmem-cell-names
>> 95 - "#thermal-sensor-cells"
102 96
103 additionalProperties: false 97 additionalProperties: false
104 98
105 examples: 99 examples:
106 - | 100 - |
107 #include <dt-bindings/interrupt-controller 101 #include <dt-bindings/interrupt-controller/arm-gic.h>
108 #include <dt-bindings/clock/mt8195-clk.h> 102 #include <dt-bindings/clock/mt8195-clk.h>
109 #include <dt-bindings/reset/mt8195-resets. 103 #include <dt-bindings/reset/mt8195-resets.h>
110 #include <dt-bindings/thermal/mediatek,lvt 104 #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
111 105
112 soc { 106 soc {
113 #address-cells = <2>; 107 #address-cells = <2>;
114 #size-cells = <2>; 108 #size-cells = <2>;
115 109
116 lvts_mcu: thermal-sensor@11278000 { 110 lvts_mcu: thermal-sensor@11278000 {
117 compatible = "mediatek,mt8195-lvts-mcu 111 compatible = "mediatek,mt8195-lvts-mcu";
118 reg = <0 0x11278000 0 0x1000>; 112 reg = <0 0x11278000 0 0x1000>;
119 interrupts = <GIC_SPI 170 IRQ_TYPE_LEV 113 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
120 clocks = <&infracfg_ao CLK_INFRA_AO_TH 114 clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
121 resets = <&infracfg_ao MT8195_INFRA_RS 115 resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
122 nvmem-cells = <&lvts_efuse_data1 &lvts 116 nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
123 nvmem-cell-names = "lvts-calib-data-1" 117 nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
124 #thermal-sensor-cells = <1>; 118 #thermal-sensor-cells = <1>;
125 }; 119 };
126 }; 120 };
127 121
128 thermal_zones: thermal-zones { 122 thermal_zones: thermal-zones {
129 cpu0-thermal { 123 cpu0-thermal {
130 polling-delay = <1000>; 124 polling-delay = <1000>;
131 polling-delay-passive = <250>; 125 polling-delay-passive = <250>;
132 thermal-sensors = <&lvts_mcu MT8195_MC 126 thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
133 127
134 trips { 128 trips {
135 cpu0_alert: trip-alert { 129 cpu0_alert: trip-alert {
136 temperature = <85000>; 130 temperature = <85000>;
137 hysteresis = <2000>; 131 hysteresis = <2000>;
138 type = "passive"; 132 type = "passive";
139 }; 133 };
140 134
141 cpu0_crit: trip-crit { 135 cpu0_crit: trip-crit {
142 temperature = <100000>; 136 temperature = <100000>;
143 hysteresis = <2000>; 137 hysteresis = <2000>;
144 type = "critical"; 138 type = "critical";
145 }; 139 };
146 }; 140 };
147 }; 141 };
148 }; 142 };
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