1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/timer/nxp,s 4 $id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NXP System Counter Module(sys_ctr) 7 title: NXP System Counter Module(sys_ctr)
8 8
9 maintainers: 9 maintainers:
10 - Bai Ping <ping.bai@nxp.com> 10 - Bai Ping <ping.bai@nxp.com>
11 11
12 description: | 12 description: |
13 The system counter(sys_ctr) is a programmabl 13 The system counter(sys_ctr) is a programmable system counter
14 which provides a shared time base to Cortex 14 which provides a shared time base to Cortex A15, A7, A53, A73,
15 etc. it is intended for use in applications 15 etc. it is intended for use in applications where the counter
16 is always powered and support multiple, unre 16 is always powered and support multiple, unrelated clocks. The
17 compare frame inside can be used for timer p 17 compare frame inside can be used for timer purpose.
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 enum: 21 enum:
22 - nxp,imx95-sysctr-timer 22 - nxp,imx95-sysctr-timer
23 - nxp,sysctr-timer 23 - nxp,sysctr-timer
24 24
25 reg: 25 reg:
26 maxItems: 1 26 maxItems: 1
27 27
28 interrupts: 28 interrupts:
29 maxItems: 1 29 maxItems: 1
30 30
31 clocks: 31 clocks:
32 maxItems: 1 32 maxItems: 1
33 33
34 clock-names: 34 clock-names:
35 const: per 35 const: per
36 36
37 nxp,no-divider: 37 nxp,no-divider:
38 description: if present, means there is no 38 description: if present, means there is no internal base clk divider.
39 type: boolean 39 type: boolean
40 40
41 required: 41 required:
42 - compatible 42 - compatible
43 - reg 43 - reg
44 - interrupts 44 - interrupts
45 - clocks 45 - clocks
46 - clock-names 46 - clock-names
47 47
48 additionalProperties: false 48 additionalProperties: false
49 49
50 examples: 50 examples:
51 - | 51 - |
52 #include <dt-bindings/interrupt-controller 52 #include <dt-bindings/interrupt-controller/arm-gic.h>
53 53
54 timer@306a0000 { 54 timer@306a0000 {
55 compatible = "nxp,sysctr-timer"; 55 compatible = "nxp,sysctr-timer";
56 reg = <0x306a0000 0x20000>; 56 reg = <0x306a0000 0x20000>;
57 clocks = <&clk_8m>; 57 clocks = <&clk_8m>;
58 clock-names = "per"; 58 clock-names = "per";
59 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVE 59 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
60 }; 60 };
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