1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/ufs/samsung 4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Samsung SoC series UFS host controller !! 7 title: Samsung SoC series UFS host controller Device Tree Bindings 8 8 9 maintainers: 9 maintainers: 10 - Alim Akhtar <alim.akhtar@samsung.com> 10 - Alim Akhtar <alim.akhtar@samsung.com> 11 11 12 description: | 12 description: | 13 Each Samsung UFS host controller instance sh 13 Each Samsung UFS host controller instance should have its own node. >> 14 This binding define Samsung specific binding other then what is used >> 15 in the common ufshcd bindings >> 16 [1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt 14 17 15 properties: 18 properties: >> 19 16 compatible: 20 compatible: 17 enum: 21 enum: 18 - google,gs101-ufs << 19 - samsung,exynos7-ufs 22 - samsung,exynos7-ufs 20 - samsung,exynosautov9-ufs << 21 - samsung,exynosautov9-ufs-vh << 22 - tesla,fsd-ufs << 23 23 24 reg: 24 reg: 25 items: 25 items: 26 - description: HCI register 26 - description: HCI register 27 - description: vendor specific register 27 - description: vendor specific register 28 - description: unipro register 28 - description: unipro register 29 - description: UFS protector register 29 - description: UFS protector register 30 30 31 reg-names: 31 reg-names: 32 items: 32 items: 33 - const: hci 33 - const: hci 34 - const: vs_hci 34 - const: vs_hci 35 - const: unipro 35 - const: unipro 36 - const: ufsp 36 - const: ufsp 37 37 38 clocks: 38 clocks: 39 minItems: 2 << 40 items: 39 items: 41 - description: ufs link core clock 40 - description: ufs link core clock 42 - description: unipro main clock 41 - description: unipro main clock 43 - description: fmp clock << 44 - description: ufs aclk clock << 45 - description: ufs pclk clock << 46 - description: sysreg clock << 47 42 48 clock-names: 43 clock-names: 49 minItems: 2 << 50 items: 44 items: 51 - const: core_clk 45 - const: core_clk 52 - const: sclk_unipro_main 46 - const: sclk_unipro_main 53 - const: fmp !! 47 54 - const: aclk !! 48 interrupts: 55 - const: pclk !! 49 maxItems: 1 56 - const: sysreg << 57 50 58 phys: 51 phys: 59 maxItems: 1 52 maxItems: 1 60 53 61 phy-names: 54 phy-names: 62 const: ufs-phy 55 const: ufs-phy 63 56 64 samsung,sysreg: << 65 $ref: /schemas/types.yaml#/definitions/pha << 66 items: << 67 - items: << 68 - description: phandle to FSYSx sysr << 69 - description: offset of the control << 70 description: << 71 Phandle and offset to the FSYSx sysreg f << 72 << 73 dma-coherent: true << 74 << 75 required: 57 required: 76 - compatible 58 - compatible 77 - reg 59 - reg >> 60 - interrupts 78 - phys 61 - phys 79 - phy-names 62 - phy-names 80 - clocks 63 - clocks 81 - clock-names 64 - clock-names 82 65 83 allOf: !! 66 additionalProperties: false 84 - $ref: ufs-common.yaml << 85 - if: << 86 properties: << 87 compatible: << 88 contains: << 89 const: google,gs101-ufs << 90 << 91 then: << 92 properties: << 93 clocks: << 94 minItems: 6 << 95 << 96 clock-names: << 97 minItems: 6 << 98 << 99 else: << 100 properties: << 101 clocks: << 102 maxItems: 2 << 103 << 104 clock-names: << 105 maxItems: 2 << 106 << 107 unevaluatedProperties: false << 108 67 109 examples: 68 examples: 110 - | 69 - | 111 #include <dt-bindings/interrupt-controller 70 #include <dt-bindings/interrupt-controller/arm-gic.h> 112 #include <dt-bindings/clock/exynos7-clk.h> 71 #include <dt-bindings/clock/exynos7-clk.h> 113 72 114 ufs: ufs@15570000 { 73 ufs: ufs@15570000 { 115 compatible = "samsung,exynos7-ufs"; 74 compatible = "samsung,exynos7-ufs"; 116 reg = <0x15570000 0x100>, 75 reg = <0x15570000 0x100>, 117 <0x15570100 0x100>, 76 <0x15570100 0x100>, 118 <0x15571000 0x200>, 77 <0x15571000 0x200>, 119 <0x15572000 0x300>; 78 <0x15572000 0x300>; 120 reg-names = "hci", "vs_hci", "unipro", 79 reg-names = "hci", "vs_hci", "unipro", "ufsp"; 121 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVE 80 interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; 122 clocks = <&clock_fsys1 ACLK_UFS20_LINK> 81 clocks = <&clock_fsys1 ACLK_UFS20_LINK>, 123 <&clock_fsys1 SCLK_UFSUNIPRO20 82 <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; 124 clock-names = "core_clk", "sclk_unipro_ 83 clock-names = "core_clk", "sclk_unipro_main"; 125 pinctrl-names = "default"; 84 pinctrl-names = "default"; 126 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out 85 pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; 127 phys = <&ufs_phy>; 86 phys = <&ufs_phy>; 128 phy-names = "ufs-phy"; 87 phy-names = "ufs-phy"; 129 }; 88 }; 130 ... 89 ...
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