1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/usb/rockchi
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Rockchip RK3399 SuperSpeed DWC3 USB SoC
8
9 maintainers:
10 - Heiko Stuebner <heiko@sntech.de>
11
12 properties:
13 compatible:
14 const: rockchip,rk3399-dwc3
15
16 '#address-cells':
17 const: 2
18
19 '#size-cells':
20 const: 2
21
22 ranges: true
23
24 clocks:
25 items:
26 - description:
27 Controller reference clock, must to
28 - description:
29 Controller suspend clock, must to be
30 - description:
31 Master/Core clock, must to be >= 62.
32 operation and >= 30MHz for HS operat
33 - description:
34 USB3 aclk peri
35 - description:
36 USB3 aclk
37 - description:
38 Controller grf clock
39
40 clock-names:
41 items:
42 - const: ref_clk
43 - const: suspend_clk
44 - const: bus_clk
45 - const: aclk_usb3_rksoc_axi_perf
46 - const: aclk_usb3
47 - const: grf_clk
48
49 resets:
50 maxItems: 1
51
52 reset-names:
53 const: usb3-otg
54
55 patternProperties:
56 '^usb@':
57 $ref: snps,dwc3.yaml#
58
59 additionalProperties: false
60
61 required:
62 - compatible
63 - '#address-cells'
64 - '#size-cells'
65 - ranges
66 - clocks
67 - clock-names
68 - resets
69 - reset-names
70
71 examples:
72 - |
73 #include <dt-bindings/clock/rk3399-cru.h>
74 #include <dt-bindings/power/rk3399-power.h
75 #include <dt-bindings/interrupt-controller
76
77 bus {
78 #address-cells = <2>;
79 #size-cells = <2>;
80
81 usb {
82 compatible = "rockchip,rk3399-dwc3
83 #address-cells = <2>;
84 #size-cells = <2>;
85 ranges;
86 clocks = <&cru SCLK_USB3OTG0_REF>,
87 <&cru ACLK_USB3OTG0>, <&c
88 <&cru ACLK_USB3>, <&cru A
89 clock-names = "ref_clk", "suspend_
90 "bus_clk", "aclk_usb
91 "aclk_usb3", "grf_cl
92 resets = <&cru SRST_A_USB3_OTG0>;
93 reset-names = "usb3-otg";
94
95 usb@fe800000 {
96 compatible = "snps,dwc3";
97 reg = <0x0 0xfe800000 0x0 0x10
98 interrupts = <GIC_SPI 105 IRQ_
99 clocks = <&cru SCLK_USB3OTG0_R
100 <&cru SCLK_USB3OTG0_S
101 clock-names = "ref", "bus_earl
102 dr_mode = "otg";
103 phys = <&u2phy0_otg>, <&tcphy0
104 phy-names = "usb2-phy", "usb3-
105 phy_type = "utmi_wide";
106 snps,dis_enblslpm_quirk;
107 snps,dis-u2-freeclk-exists-qui
108 snps,dis_u2_susphy_quirk;
109 snps,dis-del-phy-power-chg-qui
110 snps,dis-tx-ipgap-linecheck-qu
111 power-domains = <&power RK3399
112 };
113 };
114 };
115 ...
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