1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/usb/starfiv 4 $id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: StarFive JH7110 wrapper module for the 7 title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller
8 8
9 maintainers: 9 maintainers:
10 - Minda Chen <minda.chen@starfivetech.com> 10 - Minda Chen <minda.chen@starfivetech.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 const: starfive,jh7110-usb 14 const: starfive,jh7110-usb
15 15
16 ranges: true 16 ranges: true
17 17
18 starfive,stg-syscon: 18 starfive,stg-syscon:
19 $ref: /schemas/types.yaml#/definitions/pha 19 $ref: /schemas/types.yaml#/definitions/phandle-array
20 items: 20 items:
21 - items: 21 - items:
22 - description: phandle to System Reg 22 - description: phandle to System Register Controller stg_syscon node.
23 - description: dr mode register offs 23 - description: dr mode register offset of STG_SYSCONSAIF__SYSCFG register for USB.
24 description: 24 description:
25 The phandle to System Register Controlle 25 The phandle to System Register Controller syscon node and the offset
26 of STG_SYSCONSAIF__SYSCFG register for U 26 of STG_SYSCONSAIF__SYSCFG register for USB.
27 27
28 dr_mode: 28 dr_mode:
29 enum: [host, otg, peripheral] 29 enum: [host, otg, peripheral]
30 30
31 "#address-cells": 31 "#address-cells":
32 enum: [1, 2] 32 enum: [1, 2]
33 33
34 "#size-cells": 34 "#size-cells":
35 enum: [1, 2] 35 enum: [1, 2]
36 36
37 clocks: 37 clocks:
38 items: 38 items:
39 - description: link power management clo 39 - description: link power management clock
40 - description: standby clock 40 - description: standby clock
41 - description: APB clock 41 - description: APB clock
42 - description: AXI clock 42 - description: AXI clock
43 - description: UTMI APB clock 43 - description: UTMI APB clock
44 44
45 clock-names: 45 clock-names:
46 items: 46 items:
47 - const: lpm 47 - const: lpm
48 - const: stb 48 - const: stb
49 - const: apb 49 - const: apb
50 - const: axi 50 - const: axi
51 - const: utmi_apb 51 - const: utmi_apb
52 52
53 resets: 53 resets:
54 items: 54 items:
55 - description: Power up reset 55 - description: Power up reset
56 - description: APB clock reset 56 - description: APB clock reset
57 - description: AXI clock reset 57 - description: AXI clock reset
58 - description: UTMI APB clock reset 58 - description: UTMI APB clock reset
59 59
60 reset-names: 60 reset-names:
61 items: 61 items:
62 - const: pwrup 62 - const: pwrup
63 - const: apb 63 - const: apb
64 - const: axi 64 - const: axi
65 - const: utmi_apb 65 - const: utmi_apb
66 66
67 patternProperties: 67 patternProperties:
68 "^usb@[0-9a-f]+$": 68 "^usb@[0-9a-f]+$":
69 $ref: cdns,usb3.yaml# 69 $ref: cdns,usb3.yaml#
70 description: Required child node 70 description: Required child node
71 71
72 required: 72 required:
73 - compatible 73 - compatible
74 - ranges 74 - ranges
75 - starfive,stg-syscon 75 - starfive,stg-syscon
76 - '#address-cells' 76 - '#address-cells'
77 - '#size-cells' 77 - '#size-cells'
78 - dr_mode 78 - dr_mode
79 - clocks 79 - clocks
80 - resets 80 - resets
81 81
82 additionalProperties: false 82 additionalProperties: false
83 83
84 examples: 84 examples:
85 - | 85 - |
86 usb@10100000 { 86 usb@10100000 {
87 compatible = "starfive,jh7110-usb"; 87 compatible = "starfive,jh7110-usb";
88 ranges = <0x0 0x10100000 0x100000>; 88 ranges = <0x0 0x10100000 0x100000>;
89 #address-cells = <1>; 89 #address-cells = <1>;
90 #size-cells = <1>; 90 #size-cells = <1>;
91 starfive,stg-syscon = <&stg_syscon 0x4 91 starfive,stg-syscon = <&stg_syscon 0x4>;
92 clocks = <&syscrg 4>, 92 clocks = <&syscrg 4>,
93 <&stgcrg 5>, 93 <&stgcrg 5>,
94 <&stgcrg 1>, 94 <&stgcrg 1>,
95 <&stgcrg 3>, 95 <&stgcrg 3>,
96 <&stgcrg 2>; 96 <&stgcrg 2>;
97 clock-names = "lpm", "stb", "apb", "ax 97 clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
98 resets = <&stgcrg 10>, 98 resets = <&stgcrg 10>,
99 <&stgcrg 8>, 99 <&stgcrg 8>,
100 <&stgcrg 7>, 100 <&stgcrg 7>,
101 <&stgcrg 9>; 101 <&stgcrg 9>;
102 reset-names = "pwrup", "apb", "axi", " 102 reset-names = "pwrup", "apb", "axi", "utmi_apb";
103 dr_mode = "host"; 103 dr_mode = "host";
104 104
105 usb@0 { 105 usb@0 {
106 compatible = "cdns,usb3"; 106 compatible = "cdns,usb3";
107 reg = <0x0 0x10000>, 107 reg = <0x0 0x10000>,
108 <0x10000 0x10000>, 108 <0x10000 0x10000>,
109 <0x20000 0x10000>; 109 <0x20000 0x10000>;
110 reg-names = "otg", "xhci", "dev"; 110 reg-names = "otg", "xhci", "dev";
111 interrupts = <100>, <108>, <110>; 111 interrupts = <100>, <108>, <110>;
112 interrupt-names = "host", "periphe 112 interrupt-names = "host", "peripheral", "otg";
113 maximum-speed = "super-speed"; 113 maximum-speed = "super-speed";
114 }; 114 };
115 }; 115 };
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