1 ================================ 2 Devres - Managed Device Resource 3 ================================ 4 5 Tejun Heo <teheo@suse.de> 6 7 First draft 10 January 2007 8 9 .. contents 10 11 1. Intro : Huh? Devres? 12 2. Devres : Devres in a 13 3. Devres Group : Group devres 14 4. Details : Life time ru 15 5. Overhead : How much do 16 6. List of managed interfaces: Currently im 17 18 19 1. Intro 20 -------- 21 22 devres came up while trying to convert libata 23 iomapped address should be kept and unmapped o 24 example, a plain SFF ATA controller (that is, 25 native mode makes use of 5 PCI BARs and all of 26 maintained. 27 28 As with many other device drivers, libata low 29 sufficient bugs in ->remove and ->probe failur 30 that's probably because libata low level drive 31 bunch, but aren't all low level driver develop 32 day fiddling with braindamaged hardware with n 33 braindamaged document, if it's finally working 34 35 For one reason or another, low level drivers d 36 attention or testing as core code, and bugs on 37 initialization failure don't happen often enou 38 Init failure path is worse because it's much l 39 needs to handle multiple entry points. 40 41 So, many low level drivers end up leaking reso 42 and having half broken failure path implementa 43 would leak resources or even cause oops when f 44 adds more to this mix. So do msi and msix. 45 46 47 2. Devres 48 --------- 49 50 devres is basically linked list of arbitrarily 51 associated with a struct device. Each devres 52 a release function. A devres can be released 53 matter what, all devres entries are released o 54 release, the associated release function is in 55 devres entry is freed. 56 57 Managed interface is created for resources com 58 drivers using devres. For example, coherent D 59 using dma_alloc_coherent(). The managed versi 60 dmam_alloc_coherent(). It is identical to dma 61 for the DMA memory allocated using it is manag 62 automatically released on driver detach. Impl 63 the following:: 64 65 struct dma_devres { 66 size_t size; 67 void *vaddr; 68 dma_addr_t dma_handle; 69 }; 70 71 static void dmam_coherent_release(struct dev 72 { 73 struct dma_devres *this = res; 74 75 dma_free_coherent(dev, this->size, thi 76 } 77 78 dmam_alloc_coherent(dev, size, dma_handle, g 79 { 80 struct dma_devres *dr; 81 void *vaddr; 82 83 dr = devres_alloc(dmam_coherent_releas 84 ... 85 86 /* alloc DMA memory as usual */ 87 vaddr = dma_alloc_coherent(...); 88 ... 89 90 /* record size, vaddr, dma_handle in d 91 dr->vaddr = vaddr; 92 ... 93 94 devres_add(dev, dr); 95 96 return vaddr; 97 } 98 99 If a driver uses dmam_alloc_coherent(), the ar 100 freed whether initialization fails half-way or 101 detached. If most resources are acquired usin 102 driver can have much simpler init and exit cod 103 looks like the following:: 104 105 my_init_one() 106 { 107 struct mydev *d; 108 109 d = devm_kzalloc(dev, sizeof(*d), GFP_ 110 if (!d) 111 return -ENOMEM; 112 113 d->ring = dmam_alloc_coherent(...); 114 if (!d->ring) 115 return -ENOMEM; 116 117 if (check something) 118 return -EINVAL; 119 ... 120 121 return register_to_upper_layer(d); 122 } 123 124 And exit path:: 125 126 my_remove_one() 127 { 128 unregister_from_upper_layer(d); 129 shutdown_my_hardware(); 130 } 131 132 As shown above, low level drivers can be simpl 133 devres. Complexity is shifted from less maint 134 to better maintained higher layer. Also, as i 135 shared with exit path, both can get more testi 136 137 Note though that when converting current calls 138 managed devm_* versions it is up to you to che 139 like allocating memory, have failed. Managed r 140 freeing of these resources *only* - all other 141 on you. In some cases this may mean introducin 142 necessary before moving to the managed devm_* 143 144 145 3. Devres group 146 --------------- 147 148 Devres entries can be grouped using devres gro 149 released, all contained normal devres entries 150 groups are released. One usage is to rollback 151 resources on failure. For example:: 152 153 if (!devres_open_group(dev, NULL, GFP_KERNEL 154 return -ENOMEM; 155 156 acquire A; 157 if (failed) 158 goto err; 159 160 acquire B; 161 if (failed) 162 goto err; 163 ... 164 165 devres_remove_group(dev, NULL); 166 return 0; 167 168 err: 169 devres_release_group(dev, NULL); 170 return err_code; 171 172 As resource acquisition failure usually means 173 like above are usually useful in midlayer driv 174 layer) where interface function shouldn't have 175 For LLDs, just returning error code suffices i 176 177 Each group is identified by `void *id`. It ca 178 specified by @id argument to devres_open_group 179 created by passing NULL as @id as in the above 180 cases, devres_open_group() returns the group's 181 can be passed to other devres functions to sel 182 If NULL is given to those functions, the lates 183 selected. 184 185 For example, you can do something like the fol 186 187 int my_midlayer_create_something() 188 { 189 if (!devres_open_group(dev, my_midlaye 190 return -ENOMEM; 191 192 ... 193 194 devres_close_group(dev, my_midlayer_cr 195 return 0; 196 } 197 198 void my_midlayer_destroy_something() 199 { 200 devres_release_group(dev, my_midlayer_ 201 } 202 203 204 4. Details 205 ---------- 206 207 Lifetime of a devres entry begins on devres al 208 when it is released or destroyed (removed and 209 counting. 210 211 devres core guarantees atomicity to all basic 212 has support for single-instance devres types ( 213 lookup-and-add-if-not-found). Other than that 214 concurrent accesses to allocated devres data i 215 responsibility. This is usually non-issue bec 216 resource allocations already do the job. 217 218 For an example of single-instance devres type, 219 in lib/devres.c. 220 221 All devres interface functions can be called w 222 right gfp mask is given. 223 224 225 5. Overhead 226 ----------- 227 228 Each devres bookkeeping info is allocated toge 229 area. With debug option turned off, bookkeepi 230 bytes on 32bit machines and 24 bytes on 64bit 231 up to ull alignment). If singly linked list i 232 reduced to two pointers (8 bytes on 32bit, 16 233 234 Each devres group occupies 8 pointers. It can 235 singly linked list is used. 236 237 Memory space overhead on ahci controller with 238 and 400 bytes on 32bit machine after naive con 239 certainly invest a bit more effort into libata 240 241 242 6. List of managed interfaces 243 ----------------------------- 244 245 CLOCK 246 devm_clk_get() 247 devm_clk_get_optional() 248 devm_clk_put() 249 devm_clk_bulk_get() 250 devm_clk_bulk_get_all() 251 devm_clk_bulk_get_optional() 252 devm_get_clk_from_child() 253 devm_clk_hw_register() 254 devm_of_clk_add_hw_provider() 255 devm_clk_hw_register_clkdev() 256 257 DMA 258 dmaenginem_async_device_register() 259 dmam_alloc_coherent() 260 dmam_alloc_attrs() 261 dmam_free_coherent() 262 dmam_pool_create() 263 dmam_pool_destroy() 264 265 DRM 266 devm_drm_dev_alloc() 267 268 GPIO 269 devm_gpiod_get() 270 devm_gpiod_get_array() 271 devm_gpiod_get_array_optional() 272 devm_gpiod_get_index() 273 devm_gpiod_get_index_optional() 274 devm_gpiod_get_optional() 275 devm_gpiod_put() 276 devm_gpiod_unhinge() 277 devm_gpiochip_add_data() 278 devm_gpio_request() 279 devm_gpio_request_one() 280 281 I2C 282 devm_i2c_add_adapter() 283 devm_i2c_new_dummy_device() 284 285 IIO 286 devm_iio_device_alloc() 287 devm_iio_device_register() 288 devm_iio_dmaengine_buffer_setup() 289 devm_iio_kfifo_buffer_setup() 290 devm_iio_kfifo_buffer_setup_ext() 291 devm_iio_map_array_register() 292 devm_iio_triggered_buffer_setup() 293 devm_iio_triggered_buffer_setup_ext() 294 devm_iio_trigger_alloc() 295 devm_iio_trigger_register() 296 devm_iio_channel_get() 297 devm_iio_channel_get_all() 298 devm_iio_hw_consumer_alloc() 299 devm_fwnode_iio_channel_get_by_name() 300 301 INPUT 302 devm_input_allocate_device() 303 304 IO region 305 devm_release_mem_region() 306 devm_release_region() 307 devm_release_resource() 308 devm_request_mem_region() 309 devm_request_free_mem_region() 310 devm_request_region() 311 devm_request_resource() 312 313 IOMAP 314 devm_ioport_map() 315 devm_ioport_unmap() 316 devm_ioremap() 317 devm_ioremap_uc() 318 devm_ioremap_wc() 319 devm_ioremap_resource() : checks resource, r 320 devm_ioremap_resource_wc() 321 devm_platform_ioremap_resource() : calls dev 322 devm_platform_ioremap_resource_byname() 323 devm_platform_get_and_ioremap_resource() 324 devm_iounmap() 325 326 Note: For the PCI devices the specific pcim_ 327 328 IRQ 329 devm_free_irq() 330 devm_request_any_context_irq() 331 devm_request_irq() 332 devm_request_threaded_irq() 333 devm_irq_alloc_descs() 334 devm_irq_alloc_desc() 335 devm_irq_alloc_desc_at() 336 devm_irq_alloc_desc_from() 337 devm_irq_alloc_descs_from() 338 devm_irq_alloc_generic_chip() 339 devm_irq_setup_generic_chip() 340 devm_irq_domain_create_sim() 341 342 LED 343 devm_led_classdev_register() 344 devm_led_classdev_register_ext() 345 devm_led_classdev_unregister() 346 devm_led_trigger_register() 347 devm_of_led_get() 348 349 MDIO 350 devm_mdiobus_alloc() 351 devm_mdiobus_alloc_size() 352 devm_mdiobus_register() 353 devm_of_mdiobus_register() 354 355 MEM 356 devm_free_pages() 357 devm_get_free_pages() 358 devm_kasprintf() 359 devm_kcalloc() 360 devm_kfree() 361 devm_kmalloc() 362 devm_kmalloc_array() 363 devm_kmemdup() 364 devm_krealloc() 365 devm_krealloc_array() 366 devm_kstrdup() 367 devm_kstrdup_const() 368 devm_kvasprintf() 369 devm_kzalloc() 370 371 MFD 372 devm_mfd_add_devices() 373 374 MUX 375 devm_mux_chip_alloc() 376 devm_mux_chip_register() 377 devm_mux_control_get() 378 devm_mux_state_get() 379 380 NET 381 devm_alloc_etherdev() 382 devm_alloc_etherdev_mqs() 383 devm_register_netdev() 384 385 PER-CPU MEM 386 devm_alloc_percpu() 387 devm_free_percpu() 388 389 PCI 390 devm_pci_alloc_host_bridge() : managed PCI 391 devm_pci_remap_cfgspace() : ioremap PCI 392 devm_pci_remap_cfg_resource() : ioremap PCI 393 394 pcim_enable_device() : after succes 395 pcim_iomap() : do iomap() o 396 pcim_iomap_regions() : do request_r 397 pcim_iomap_regions_request_all() : do reques 398 pcim_iomap_table() : array of map 399 pcim_iounmap() : do iounmap() 400 pcim_iounmap_regions() : do iounmap() 401 pcim_pin_device() : keep PCI dev 402 pcim_set_mwi() : enable Memor 403 404 PHY 405 devm_usb_get_phy() 406 devm_usb_get_phy_by_node() 407 devm_usb_get_phy_by_phandle() 408 devm_usb_put_phy() 409 410 PINCTRL 411 devm_pinctrl_get() 412 devm_pinctrl_put() 413 devm_pinctrl_get_select() 414 devm_pinctrl_register() 415 devm_pinctrl_register_and_init() 416 devm_pinctrl_unregister() 417 418 POWER 419 devm_reboot_mode_register() 420 devm_reboot_mode_unregister() 421 422 PWM 423 devm_pwmchip_alloc() 424 devm_pwmchip_add() 425 devm_pwm_get() 426 devm_fwnode_pwm_get() 427 428 REGULATOR 429 devm_regulator_bulk_register_supply_alias() 430 devm_regulator_bulk_get() 431 devm_regulator_bulk_get_const() 432 devm_regulator_bulk_get_enable() 433 devm_regulator_bulk_put() 434 devm_regulator_get() 435 devm_regulator_get_enable() 436 devm_regulator_get_enable_read_voltage() 437 devm_regulator_get_enable_optional() 438 devm_regulator_get_exclusive() 439 devm_regulator_get_optional() 440 devm_regulator_irq_helper() 441 devm_regulator_put() 442 devm_regulator_register() 443 devm_regulator_register_notifier() 444 devm_regulator_register_supply_alias() 445 devm_regulator_unregister_notifier() 446 447 RESET 448 devm_reset_control_get() 449 devm_reset_controller_register() 450 451 RTC 452 devm_rtc_device_register() 453 devm_rtc_allocate_device() 454 devm_rtc_register_device() 455 devm_rtc_nvmem_register() 456 457 SERDEV 458 devm_serdev_device_open() 459 460 SLAVE DMA ENGINE 461 devm_acpi_dma_controller_register() 462 devm_acpi_dma_controller_free() 463 464 SPI 465 devm_spi_alloc_master() 466 devm_spi_alloc_slave() 467 devm_spi_optimize_message() 468 devm_spi_register_controller() 469 devm_spi_register_host() 470 devm_spi_register_target() 471 472 WATCHDOG 473 devm_watchdog_register_device()
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