1 FPGA Manager 1 FPGA Manager
2 ============ 2 ============
3 3
4 Overview 4 Overview
5 -------- 5 --------
6 6
7 The FPGA manager core exports a set of functio 7 The FPGA manager core exports a set of functions for programming an FPGA with
8 an image. The API is manufacturer agnostic. 8 an image. The API is manufacturer agnostic. All manufacturer specifics are
9 hidden away in a low level driver which regist 9 hidden away in a low level driver which registers a set of ops with the core.
10 The FPGA image data itself is very manufacture 10 The FPGA image data itself is very manufacturer specific, but for our purposes
11 it's just binary data. The FPGA manager core 11 it's just binary data. The FPGA manager core won't parse it.
12 12
13 The FPGA image to be programmed can be in a sc 13 The FPGA image to be programmed can be in a scatter gather list, a single
14 contiguous buffer, or a firmware file. Becaus 14 contiguous buffer, or a firmware file. Because allocating contiguous kernel
15 memory for the buffer should be avoided, users 15 memory for the buffer should be avoided, users are encouraged to use a scatter
16 gather list instead if possible. 16 gather list instead if possible.
17 17
18 The particulars for programming the image are 18 The particulars for programming the image are presented in a structure (struct
19 fpga_image_info). This struct contains parame 19 fpga_image_info). This struct contains parameters such as pointers to the
20 FPGA image as well as image-specific particula 20 FPGA image as well as image-specific particulars such as whether the image was
21 built for full or partial reconfiguration. 21 built for full or partial reconfiguration.
22 22
23 How to support a new FPGA device 23 How to support a new FPGA device
24 -------------------------------- 24 --------------------------------
25 25
26 To add another FPGA manager, write a driver th 26 To add another FPGA manager, write a driver that implements a set of ops. The
27 probe function calls ``fpga_mgr_register()`` o !! 27 probe function calls fpga_mgr_register(), such as::
28 such as:: <<
29 28
30 static const struct fpga_manager_ops s 29 static const struct fpga_manager_ops socfpga_fpga_ops = {
31 .write_init = socfpga_fpga_ops 30 .write_init = socfpga_fpga_ops_configure_init,
32 .write = socfpga_fpga_ops_conf 31 .write = socfpga_fpga_ops_configure_write,
33 .write_complete = socfpga_fpga 32 .write_complete = socfpga_fpga_ops_configure_complete,
34 .state = socfpga_fpga_ops_stat 33 .state = socfpga_fpga_ops_state,
35 }; 34 };
36 35
37 static int socfpga_fpga_probe(struct p 36 static int socfpga_fpga_probe(struct platform_device *pdev)
38 { 37 {
39 struct device *dev = &pdev->de 38 struct device *dev = &pdev->dev;
40 struct socfpga_fpga_priv *priv 39 struct socfpga_fpga_priv *priv;
41 struct fpga_manager *mgr; 40 struct fpga_manager *mgr;
42 int ret; 41 int ret;
43 42
44 priv = devm_kzalloc(dev, sizeo 43 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
45 if (!priv) 44 if (!priv)
46 return -ENOMEM; 45 return -ENOMEM;
47 46
48 /* 47 /*
49 * do ioremaps, get interrupts 48 * do ioremaps, get interrupts, etc. and save
50 * them in priv 49 * them in priv
51 */ 50 */
52 51
53 mgr = fpga_mgr_register(dev, " !! 52 mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",
54 &socfp !! 53 &socfpga_fpga_ops, priv);
55 if (IS_ERR(mgr)) !! 54 if (!mgr)
56 return PTR_ERR(mgr); !! 55 return -ENOMEM;
57 56
58 platform_set_drvdata(pdev, mgr 57 platform_set_drvdata(pdev, mgr);
59 58
60 return 0; !! 59 return fpga_mgr_register(mgr);
61 } 60 }
62 61
63 static int socfpga_fpga_remove(struct 62 static int socfpga_fpga_remove(struct platform_device *pdev)
64 { 63 {
65 struct fpga_manager *mgr = pla 64 struct fpga_manager *mgr = platform_get_drvdata(pdev);
66 65
67 fpga_mgr_unregister(mgr); 66 fpga_mgr_unregister(mgr);
68 67
69 return 0; 68 return 0;
70 } 69 }
71 70
72 Alternatively, the probe function could call o <<
73 register functions, ``devm_fpga_mgr_register() <<
74 ``devm_fpga_mgr_register_full()``. When these <<
75 parameter syntax is the same, but the call to <<
76 removed. In the above example, the ``socfpga_f <<
77 required. <<
78 71
79 The ops will implement whatever device specifi 72 The ops will implement whatever device specific register writes are needed to
80 do the programming sequence for this particula 73 do the programming sequence for this particular FPGA. These ops return 0 for
81 success or negative error codes otherwise. 74 success or negative error codes otherwise.
82 75
83 The programming sequence is:: 76 The programming sequence is::
84 1. .parse_header (optional, may be called onc !! 77 1. .write_init
85 2. .write_init !! 78 2. .write or .write_sg (may be called once or multiple times)
86 3. .write or .write_sg (may be called once or !! 79 3. .write_complete
87 4. .write_complete <<
88 <<
89 The .parse_header function will set header_siz <<
90 struct fpga_image_info. Before parse_header ca <<
91 with initial_header_size. If flag skip_header <<
92 .write function will get image buffer starting <<
93 beginning. If data_size is set, .write functio <<
94 the image buffer, otherwise .write will get da <<
95 This will not affect .write_sg, .write_sg will <<
96 sg_table form. If FPGA image is already mapped <<
97 whole buffer will be passed into .parse_header <<
98 form, core code will buffer up at least .initi <<
99 call of .parse_header, if it is not enough, .p <<
100 size into info->header_size and return -EAGAIN <<
101 with greater part of image buffer on the input <<
102 80
103 The .write_init function will prepare the FPGA !! 81 The .write_init function will prepare the FPGA to receive the image data. The
104 buffer passed into .write_init will be at leas !! 82 buffer passed into .write_init will be at most .initial_header_size bytes long;
105 if the whole bitstream is not immediately avai 83 if the whole bitstream is not immediately available then the core code will
106 buffer up at least this much before starting. 84 buffer up at least this much before starting.
107 85
108 The .write function writes a buffer to the FPG 86 The .write function writes a buffer to the FPGA. The buffer may be contain the
109 whole FPGA image or may be a smaller chunk of 87 whole FPGA image or may be a smaller chunk of an FPGA image. In the latter
110 case, this function is called multiple times f 88 case, this function is called multiple times for successive chunks. This interface
111 is suitable for drivers which use PIO. 89 is suitable for drivers which use PIO.
112 90
113 The .write_sg version behaves the same as .wri 91 The .write_sg version behaves the same as .write except the input is a sg_table
114 scatter list. This interface is suitable for d 92 scatter list. This interface is suitable for drivers which use DMA.
115 93
116 The .write_complete function is called after a 94 The .write_complete function is called after all the image has been written
117 to put the FPGA into operating mode. 95 to put the FPGA into operating mode.
118 96
119 The ops include a .state function which will d 97 The ops include a .state function which will determine the state the FPGA is in
120 and return a code of type enum fpga_mgr_states 98 and return a code of type enum fpga_mgr_states. It doesn't result in a change
121 in state. 99 in state.
122 100
123 API for implementing a new FPGA Manager driver 101 API for implementing a new FPGA Manager driver
124 ---------------------------------------------- 102 ----------------------------------------------
125 103
126 * ``fpga_mgr_states`` - Values for :c:expr:`f 104 * ``fpga_mgr_states`` - Values for :c:expr:`fpga_manager->state`.
127 * struct fpga_manager - the FPGA manager stru 105 * struct fpga_manager - the FPGA manager struct
128 * struct fpga_manager_ops - Low level FPGA ma 106 * struct fpga_manager_ops - Low level FPGA manager driver ops
129 * struct fpga_manager_info - Parameter struct !! 107 * devm_fpga_mgr_create() - Allocate and init a manager struct
130 * __fpga_mgr_register_full() - Create and reg !! 108 * fpga_mgr_register() - Register an FPGA manager
131 fpga_mgr_info structure to provide the full <<
132 * __fpga_mgr_register() - Create and register <<
133 arguments <<
134 * __devm_fpga_mgr_register_full() - Resource <<
135 __fpga_mgr_register_full() <<
136 * __devm_fpga_mgr_register() - Resource manag <<
137 * fpga_mgr_unregister() - Unregister an FPGA 109 * fpga_mgr_unregister() - Unregister an FPGA manager
138 110
139 Helper macros ``fpga_mgr_register_full()``, `` <<
140 ``devm_fpga_mgr_register_full()``, and ``devm_ <<
141 to ease the registration. <<
142 <<
143 .. kernel-doc:: include/linux/fpga/fpga-mgr.h 111 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
144 :functions: fpga_mgr_states 112 :functions: fpga_mgr_states
145 113
146 .. kernel-doc:: include/linux/fpga/fpga-mgr.h 114 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
147 :functions: fpga_manager 115 :functions: fpga_manager
148 116
149 .. kernel-doc:: include/linux/fpga/fpga-mgr.h 117 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
150 :functions: fpga_manager_ops 118 :functions: fpga_manager_ops
151 119
152 .. kernel-doc:: include/linux/fpga/fpga-mgr.h <<
153 :functions: fpga_manager_info <<
154 <<
155 .. kernel-doc:: drivers/fpga/fpga-mgr.c <<
156 :functions: __fpga_mgr_register_full <<
157 <<
158 .. kernel-doc:: drivers/fpga/fpga-mgr.c <<
159 :functions: __fpga_mgr_register <<
160 <<
161 .. kernel-doc:: drivers/fpga/fpga-mgr.c 120 .. kernel-doc:: drivers/fpga/fpga-mgr.c
162 :functions: __devm_fpga_mgr_register_full !! 121 :functions: devm_fpga_mgr_create
163 122
164 .. kernel-doc:: drivers/fpga/fpga-mgr.c 123 .. kernel-doc:: drivers/fpga/fpga-mgr.c
165 :functions: __devm_fpga_mgr_register !! 124 :functions: fpga_mgr_register
166 125
167 .. kernel-doc:: drivers/fpga/fpga-mgr.c 126 .. kernel-doc:: drivers/fpga/fpga-mgr.c
168 :functions: fpga_mgr_unregister 127 :functions: fpga_mgr_unregister
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.