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Linux/Documentation/driver-api/gpio/intro.rst

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Diff markup

Differences between /Documentation/driver-api/gpio/intro.rst (Version linux-6.12-rc7) and /Documentation/driver-api/gpio/intro.rst (Version linux-4.11.12)


  1 ============                                      
  2 Introduction                                      
  3 ============                                      
  4                                                   
  5                                                   
  6 GPIO Interfaces                                   
  7 ===============                                   
  8                                                   
  9 The documents in this directory give detailed     
 10 GPIOs in drivers, and how to write a driver fo    
 11 itself.                                           
 12                                                   
 13                                                   
 14 What is a GPIO?                                   
 15 ===============                                   
 16                                                   
 17 A "General Purpose Input/Output" (GPIO) is a f    
 18 digital signal. They are provided from many ki    
 19 to Linux developers working with embedded and     
 20 represents a bit connected to a particular pin    
 21 (BGA) packages. Board schematics show which ex    
 22 which GPIOs. Drivers can be written genericall    
 23 passes such pin configuration data to drivers.    
 24                                                   
 25 System-on-Chip (SOC) processors heavily rely o    
 26 non-dedicated pin can be configured as a GPIO;    
 27 several dozen of them. Programmable logic devi    
 28 provide GPIOs; multifunction chips like power     
 29 often have a few such pins to help with pin sc    
 30 also "GPIO Expander" chips that connect using     
 31 Most PC southbridges have a few dozen GPIO-cap    
 32 firmware knowing how they're used).               
 33                                                   
 34 The exact capabilities of GPIOs vary between s    
 35                                                   
 36   - Output values are writable (high=1, low=0)    
 37     options about how that value is driven, so    
 38     value might be driven, supporting "wire-OR    
 39     other value (notably, "open drain" signali    
 40                                                   
 41   - Input values are likewise readable (1, 0).    
 42     of pins configured as "output", which is v    
 43     cases (to support bidirectional signaling)    
 44     input de-glitch/debounce logic, sometimes     
 45                                                   
 46   - Inputs can often be used as IRQ signals, o    
 47     sometimes level triggered. Such IRQs may b    
 48     wakeup events, to wake the system from a l    
 49                                                   
 50   - Usually a GPIO will be configurable as eit    
 51     by different product boards; single direct    
 52                                                   
 53   - Most GPIOs can be accessed while holding s    
 54     through a serial bus normally can't. Some     
 55                                                   
 56 On a given board each GPIO is used for one spe    
 57 MMC/SD card insertion/removal, detecting card     
 58 a LED, configuring a transceiver, bit-banging     
 59 watchdog, sensing a switch, and so on.            
 60                                                   
 61                                                   
 62 Common GPIO Properties                            
 63 ======================                            
 64                                                   
 65 These properties are met through all the other    
 66 and it is useful to understand them, especiall    
 67 mappings.                                         
 68                                                   
 69 Active-High and Active-Low                        
 70 --------------------------                        
 71 It is natural to assume that a GPIO is "active    
 72 ("high"), and inactive when it is 0 ("low"). H    
 73 GPIO may be inverted before is reaches its des    
 74 to have different conventions about what "acti    
 75 be transparent to device drivers, therefore it    
 76 being either active-high ("1" means "active",     
 77 means "active") so that drivers only need to w    
 78 not about what happens at the line level.         
 79                                                   
 80 Open Drain and Open Source                        
 81 --------------------------                        
 82 Sometimes shared signals need to use "open dra    
 83 level is actually driven), or "open source" (w    
 84 driven) signaling. That term applies to CMOS t    
 85 used for TTL. A pullup or pulldown resistor ca    
 86 This is sometimes called a "wire-AND"; or more    
 87 logic (low=true) perspective this is a "wire-O    
 88                                                   
 89 One common example of an open drain signal is     
 90 Also, bidirectional data bus signals sometimes    
 91                                                   
 92 Some GPIO controllers directly support open dr    
 93 don't. When you need open drain signaling but     
 94 support it, there's a common idiom you can use    
 95 that can be used as either an input or an outp    
 96                                                   
 97  **LOW**: ``gpiod_direction_output(gpio, 0)``     
 98  overrides the pullup.                            
 99                                                   
100  **HIGH**: ``gpiod_direction_input(gpio)`` ...    
101  the pullup (or some other device) controls th    
102                                                   
103 The same logic can be applied to emulate open     
104 high signal and configuring the GPIO as input     
105 source emulation can be handled transparently     
106                                                   
107 If you are "driving" the signal high but gpiod    
108 value (after the appropriate rise time passes)    
109 driving the shared signal low. That's not nece    
110 example, that's how I2C clocks are stretched:     
111 delays the rising edge of SCK, and the I2C mas    
112 accordingly.                                      
                                                      

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