1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ======================================== 3 ========================================
4 GPMC (General Purpose Memory Controller) 4 GPMC (General Purpose Memory Controller)
5 ======================================== 5 ========================================
6 6
7 GPMC is an unified memory controller dedicated 7 GPMC is an unified memory controller dedicated to interfacing external
8 memory devices like 8 memory devices like
9 9
10 * Asynchronous SRAM like memories and applica 10 * Asynchronous SRAM like memories and application specific integrated
11 circuit devices. 11 circuit devices.
12 * Asynchronous, synchronous, and page mode bu 12 * Asynchronous, synchronous, and page mode burst NOR flash devices
13 NAND flash 13 NAND flash
14 * Pseudo-SRAM devices 14 * Pseudo-SRAM devices
15 15
16 GPMC is found on Texas Instruments SoC's (OMAP 16 GPMC is found on Texas Instruments SoC's (OMAP based)
17 IP details: https://www.ti.com/lit/pdf/spruh73 17 IP details: https://www.ti.com/lit/pdf/spruh73 section 7.1
18 18
19 19
20 GPMC generic timing calculation: 20 GPMC generic timing calculation:
21 ================================ 21 ================================
22 22
23 GPMC has certain timings that has to be progra 23 GPMC has certain timings that has to be programmed for proper
24 functioning of the peripheral, while periphera 24 functioning of the peripheral, while peripheral has another set of
25 timings. To have peripheral work with gpmc, pe 25 timings. To have peripheral work with gpmc, peripheral timings has to
26 be translated to the form gpmc can understand. 26 be translated to the form gpmc can understand. The way it has to be
27 translated depends on the connected peripheral 27 translated depends on the connected peripheral. Also there is a
28 dependency for certain gpmc timings on gpmc cl 28 dependency for certain gpmc timings on gpmc clock frequency. Hence a
29 generic timing routine was developed to achiev 29 generic timing routine was developed to achieve above requirements.
30 30
31 Generic routine provides a generic method to c 31 Generic routine provides a generic method to calculate gpmc timings
32 from gpmc peripheral timings. struct gpmc_devi 32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of 33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral tim 34 connected to gpmc. A few of the peripheral timings can be fed either
35 in time or in cycles, provision to handle this 35 in time or in cycles, provision to handle this scenario has been
36 provided (refer struct gpmc_device_timings def 36 provided (refer struct gpmc_device_timings definition). It may so
37 happen that timing as specified by peripheral 37 happen that timing as specified by peripheral datasheet is not present
38 in timing structure, in this scenario, try to 38 in timing structure, in this scenario, try to correlate peripheral
39 timing to the one available. If that doesn't w 39 timing to the one available. If that doesn't work, try to add a new
40 field as required by peripheral, educate gener 40 field as required by peripheral, educate generic timing routine to
41 handle it, make sure that it does not break an 41 handle it, make sure that it does not break any of the existing.
42 Then there may be cases where peripheral datas 42 Then there may be cases where peripheral datasheet doesn't mention
43 certain fields of struct gpmc_device_timings, 43 certain fields of struct gpmc_device_timings, zero those entries.
44 44
45 Generic timing routine has been verified to wo 45 Generic timing routine has been verified to work properly on
46 multiple onenand's and tusb6010 peripherals. 46 multiple onenand's and tusb6010 peripherals.
47 47
48 A word of caution: generic timing routine has 48 A word of caution: generic timing routine has been developed based
49 on understanding of gpmc timings, peripheral t 49 on understanding of gpmc timings, peripheral timings, available
50 custom timing routines, a kind of reverse engi 50 custom timing routines, a kind of reverse engineering without
51 most of the datasheets & hardware (to be exact 51 most of the datasheets & hardware (to be exact none of those supported
52 in mainline having custom timing routine) and 52 in mainline having custom timing routine) and by simulation.
53 53
54 gpmc timing dependency on peripheral timings: 54 gpmc timing dependency on peripheral timings:
55 55
56 [<gpmc_timing>: <peripheral timing1>, <periphe 56 [<gpmc_timing>: <peripheral timing1>, <peripheral timing2> ...]
57 57
58 1. common 58 1. common
59 59
60 cs_on: 60 cs_on:
61 t_ceasu 61 t_ceasu
62 adv_on: 62 adv_on:
63 t_avdasu, t_ceavd 63 t_avdasu, t_ceavd
64 64
65 2. sync common 65 2. sync common
66 66
67 sync_clk: 67 sync_clk:
68 clk 68 clk
69 page_burst_access: 69 page_burst_access:
70 t_bacc 70 t_bacc
71 clk_activation: 71 clk_activation:
72 t_ces, t_avds 72 t_ces, t_avds
73 73
74 3. read async muxed 74 3. read async muxed
75 75
76 adv_rd_off: 76 adv_rd_off:
77 t_avdp_r 77 t_avdp_r
78 oe_on: 78 oe_on:
79 t_oeasu, t_aavdh 79 t_oeasu, t_aavdh
80 access: 80 access:
81 t_iaa, t_oe, t_ce, t_aa 81 t_iaa, t_oe, t_ce, t_aa
82 rd_cycle: 82 rd_cycle:
83 t_rd_cycle, t_cez_r, t_oez 83 t_rd_cycle, t_cez_r, t_oez
84 84
85 4. read async non-muxed 85 4. read async non-muxed
86 86
87 adv_rd_off: 87 adv_rd_off:
88 t_avdp_r 88 t_avdp_r
89 oe_on: 89 oe_on:
90 t_oeasu 90 t_oeasu
91 access: 91 access:
92 t_iaa, t_oe, t_ce, t_aa 92 t_iaa, t_oe, t_ce, t_aa
93 rd_cycle: 93 rd_cycle:
94 t_rd_cycle, t_cez_r, t_oez 94 t_rd_cycle, t_cez_r, t_oez
95 95
96 5. read sync muxed 96 5. read sync muxed
97 97
98 adv_rd_off: 98 adv_rd_off:
99 t_avdp_r, t_avdh 99 t_avdp_r, t_avdh
100 oe_on: 100 oe_on:
101 t_oeasu, t_ach, cyc_aavdh_oe 101 t_oeasu, t_ach, cyc_aavdh_oe
102 access: 102 access:
103 t_iaa, cyc_iaa, cyc_oe 103 t_iaa, cyc_iaa, cyc_oe
104 rd_cycle: 104 rd_cycle:
105 t_cez_r, t_oez, t_ce_rdyz 105 t_cez_r, t_oez, t_ce_rdyz
106 106
107 6. read sync non-muxed 107 6. read sync non-muxed
108 108
109 adv_rd_off: 109 adv_rd_off:
110 t_avdp_r 110 t_avdp_r
111 oe_on: 111 oe_on:
112 t_oeasu 112 t_oeasu
113 access: 113 access:
114 t_iaa, cyc_iaa, cyc_oe 114 t_iaa, cyc_iaa, cyc_oe
115 rd_cycle: 115 rd_cycle:
116 t_cez_r, t_oez, t_ce_rdyz 116 t_cez_r, t_oez, t_ce_rdyz
117 117
118 7. write async muxed 118 7. write async muxed
119 119
120 adv_wr_off: 120 adv_wr_off:
121 t_avdp_w 121 t_avdp_w
122 we_on, wr_data_mux_bus: 122 we_on, wr_data_mux_bus:
123 t_weasu, t_aavdh, cyc_aavhd_we 123 t_weasu, t_aavdh, cyc_aavhd_we
124 we_off: 124 we_off:
125 t_wpl 125 t_wpl
126 cs_wr_off: 126 cs_wr_off:
127 t_wph 127 t_wph
128 wr_cycle: 128 wr_cycle:
129 t_cez_w, t_wr_cycle 129 t_cez_w, t_wr_cycle
130 130
131 8. write async non-muxed 131 8. write async non-muxed
132 132
133 adv_wr_off: 133 adv_wr_off:
134 t_avdp_w 134 t_avdp_w
135 we_on, wr_data_mux_bus: 135 we_on, wr_data_mux_bus:
136 t_weasu 136 t_weasu
137 we_off: 137 we_off:
138 t_wpl 138 t_wpl
139 cs_wr_off: 139 cs_wr_off:
140 t_wph 140 t_wph
141 wr_cycle: 141 wr_cycle:
142 t_cez_w, t_wr_cycle 142 t_cez_w, t_wr_cycle
143 143
144 9. write sync muxed 144 9. write sync muxed
145 145
146 adv_wr_off: 146 adv_wr_off:
147 t_avdp_w, t_avdh 147 t_avdp_w, t_avdh
148 we_on, wr_data_mux_bus: 148 we_on, wr_data_mux_bus:
149 t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we 149 t_weasu, t_rdyo, t_aavdh, cyc_aavhd_we
150 we_off: 150 we_off:
151 t_wpl, cyc_wpl 151 t_wpl, cyc_wpl
152 cs_wr_off: 152 cs_wr_off:
153 t_wph 153 t_wph
154 wr_cycle: 154 wr_cycle:
155 t_cez_w, t_ce_rdyz 155 t_cez_w, t_ce_rdyz
156 156
157 10. write sync non-muxed 157 10. write sync non-muxed
158 158
159 adv_wr_off: 159 adv_wr_off:
160 t_avdp_w 160 t_avdp_w
161 we_on, wr_data_mux_bus: 161 we_on, wr_data_mux_bus:
162 t_weasu, t_rdyo 162 t_weasu, t_rdyo
163 we_off: 163 we_off:
164 t_wpl, cyc_wpl 164 t_wpl, cyc_wpl
165 cs_wr_off: 165 cs_wr_off:
166 t_wph 166 t_wph
167 wr_cycle: 167 wr_cycle:
168 t_cez_w, t_ce_rdyz 168 t_cez_w, t_ce_rdyz
169 169
170 170
171 Note: 171 Note:
172 Many of gpmc timings are dependent on other 172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc 173 gpmc timings purely dependent on other gpmc timings, a reason that
174 some of the gpmc timings are missing above), 174 some of the gpmc timings are missing above), and it will result in
175 indirect dependency of peripheral timings to 175 indirect dependency of peripheral timings to gpmc timings other than
176 mentioned above, refer timing routine for mo 176 mentioned above, refer timing routine for more details. To know what
177 these peripheral timings correspond to, plea 177 these peripheral timings correspond to, please see explanations in
178 struct gpmc_device_timings definition. And f 178 struct gpmc_device_timings definition. And for gpmc timings refer
179 IP details (link above). 179 IP details (link above).
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