1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ===================== 3 =====================
4 Chrome OS ACPI Device 4 Chrome OS ACPI Device
5 ===================== 5 =====================
6 6
7 Hardware functionality specific to Chrome OS i 7 Hardware functionality specific to Chrome OS is exposed through a Chrome OS ACPI device.
8 The plug and play ID of a Chrome OS ACPI devic !! 8 The plug and play ID of a Chrome OS ACPI device is GGL0001. GGL is a valid PNP ID of Google.
9 GOOG0016. The following ACPI objects are supp !! 9 PNP ID can be used with the ACPI devices according to the guidelines. The following ACPI
>> 10 objects are supported:
10 11
11 .. flat-table:: Supported ACPI Objects 12 .. flat-table:: Supported ACPI Objects
12 :widths: 1 2 13 :widths: 1 2
13 :header-rows: 1 14 :header-rows: 1
14 15
15 * - Object 16 * - Object
16 - Description 17 - Description
17 18
18 * - CHSW 19 * - CHSW
19 - Chrome OS switch positions 20 - Chrome OS switch positions
20 21
21 * - HWID 22 * - HWID
22 - Chrome OS hardware ID 23 - Chrome OS hardware ID
23 24
24 * - FWID 25 * - FWID
25 - Chrome OS firmware version 26 - Chrome OS firmware version
26 27
27 * - FRID 28 * - FRID
28 - Chrome OS read-only firmware version 29 - Chrome OS read-only firmware version
29 30
30 * - BINF 31 * - BINF
31 - Chrome OS boot information 32 - Chrome OS boot information
32 33
33 * - GPIO 34 * - GPIO
34 - Chrome OS GPIO assignments 35 - Chrome OS GPIO assignments
35 36
36 * - VBNV 37 * - VBNV
37 - Chrome OS NVRAM locations 38 - Chrome OS NVRAM locations
38 39
39 * - VDTA 40 * - VDTA
40 - Chrome OS verified boot data 41 - Chrome OS verified boot data
41 42
42 * - FMAP 43 * - FMAP
43 - Chrome OS flashmap base address 44 - Chrome OS flashmap base address
44 45
45 * - MLST 46 * - MLST
46 - Chrome OS method list 47 - Chrome OS method list
47 48
48 CHSW (Chrome OS switch positions) 49 CHSW (Chrome OS switch positions)
49 ================================= 50 =================================
50 This control method returns the switch positio 51 This control method returns the switch positions for Chrome OS specific hardware switches.
51 52
52 Arguments: 53 Arguments:
53 ---------- 54 ----------
54 None 55 None
55 56
56 Result code: 57 Result code:
57 ------------ 58 ------------
58 An integer containing the switch positions as 59 An integer containing the switch positions as bitfields:
59 60
60 .. flat-table:: 61 .. flat-table::
61 :widths: 1 2 62 :widths: 1 2
62 63
63 * - 0x00000002 64 * - 0x00000002
64 - Recovery button was pressed when x86 fi 65 - Recovery button was pressed when x86 firmware booted.
65 66
66 * - 0x00000004 67 * - 0x00000004
67 - Recovery button was pressed when EC fir 68 - Recovery button was pressed when EC firmware booted. (required if EC EEPROM is
68 rewritable; otherwise optional) 69 rewritable; otherwise optional)
69 70
70 * - 0x00000020 71 * - 0x00000020
71 - Developer switch was enabled when x86 f 72 - Developer switch was enabled when x86 firmware booted.
72 73
73 * - 0x00000200 74 * - 0x00000200
74 - Firmware write protection was disabled 75 - Firmware write protection was disabled when x86 firmware booted. (required if
75 firmware write protection is controlled 76 firmware write protection is controlled through x86 BIOS; otherwise optional)
76 77
77 All other bits are reserved and should be set 78 All other bits are reserved and should be set to 0.
78 79
79 HWID (Chrome OS hardware ID) 80 HWID (Chrome OS hardware ID)
80 ============================ 81 ============================
81 This control method returns the hardware ID fo 82 This control method returns the hardware ID for the Chromebook.
82 83
83 Arguments: 84 Arguments:
84 ---------- 85 ----------
85 None 86 None
86 87
87 Result code: 88 Result code:
88 ------------ 89 ------------
89 A null-terminated ASCII string containing the 90 A null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of
90 EEPROM. 91 EEPROM.
91 92
92 Note that the hardware ID can be up to 256 cha 93 Note that the hardware ID can be up to 256 characters long, including the terminating null.
93 94
94 FWID (Chrome OS firmware version) 95 FWID (Chrome OS firmware version)
95 ================================= 96 =================================
96 This control method returns the firmware versi 97 This control method returns the firmware version for the rewritable portion of the main
97 processor firmware. 98 processor firmware.
98 99
99 Arguments: 100 Arguments:
100 ---------- 101 ----------
101 None 102 None
102 103
103 Result code: 104 Result code:
104 ------------ 105 ------------
105 A null-terminated ASCII string containing the 106 A null-terminated ASCII string containing the complete firmware version for the rewritable
106 portion of the main processor firmware. 107 portion of the main processor firmware.
107 108
108 FRID (Chrome OS read-only firmware version) 109 FRID (Chrome OS read-only firmware version)
109 =========================================== 110 ===========================================
110 This control method returns the firmware versi 111 This control method returns the firmware version for the read-only portion of the main
111 processor firmware. 112 processor firmware.
112 113
113 Arguments: 114 Arguments:
114 ---------- 115 ----------
115 None 116 None
116 117
117 Result code: 118 Result code:
118 ------------ 119 ------------
119 A null-terminated ASCII string containing the 120 A null-terminated ASCII string containing the complete firmware version for the read-only
120 (bootstrap + recovery ) portion of the main pr 121 (bootstrap + recovery ) portion of the main processor firmware.
121 122
122 BINF (Chrome OS boot information) 123 BINF (Chrome OS boot information)
123 ================================= 124 =================================
124 This control method returns information about 125 This control method returns information about the current boot.
125 126
126 Arguments: 127 Arguments:
127 ---------- 128 ----------
128 None 129 None
129 130
130 Result code: 131 Result code:
131 ------------ 132 ------------
132 133
133 .. code-block:: 134 .. code-block::
134 135
135 Package { 136 Package {
136 Reserved1 137 Reserved1
137 Reserved2 138 Reserved2
138 Active EC Firmware 139 Active EC Firmware
139 Active Main Firmware Type 140 Active Main Firmware Type
140 Reserved5 141 Reserved5
141 } 142 }
142 143
143 .. flat-table:: 144 .. flat-table::
144 :widths: 1 1 2 145 :widths: 1 1 2
145 :header-rows: 1 146 :header-rows: 1
146 147
147 * - Field 148 * - Field
148 - Format 149 - Format
149 - Description 150 - Description
150 151
151 * - Reserved1 152 * - Reserved1
152 - DWORD 153 - DWORD
153 - Set to 256 (0x100). This indicates this 154 - Set to 256 (0x100). This indicates this field is no longer used.
154 155
155 * - Reserved2 156 * - Reserved2
156 - DWORD 157 - DWORD
157 - Set to 256 (0x100). This indicates this 158 - Set to 256 (0x100). This indicates this field is no longer used.
158 159
159 * - Active EC firmware 160 * - Active EC firmware
160 - DWORD 161 - DWORD
161 - The EC firmware which was used during b 162 - The EC firmware which was used during boot.
162 163
163 - 0 - Read-only (recovery) firmware 164 - 0 - Read-only (recovery) firmware
164 - 1 - Rewritable firmware. 165 - 1 - Rewritable firmware.
165 166
166 Set to 0 if EC firmware is always read- 167 Set to 0 if EC firmware is always read-only.
167 168
168 * - Active Main Firmware Type 169 * - Active Main Firmware Type
169 - DWORD 170 - DWORD
170 - The main firmware type which was used d 171 - The main firmware type which was used during boot.
171 172
172 - 0 - Recovery 173 - 0 - Recovery
173 - 1 - Normal 174 - 1 - Normal
174 - 2 - Developer 175 - 2 - Developer
175 - 3 - netboot (factory installation onl 176 - 3 - netboot (factory installation only)
176 177
177 Other values are reserved. 178 Other values are reserved.
178 179
179 * - Reserved5 180 * - Reserved5
180 - DWORD 181 - DWORD
181 - Set to 256 (0x100). This indicates this 182 - Set to 256 (0x100). This indicates this field is no longer used.
182 183
183 GPIO (Chrome OS GPIO assignments) 184 GPIO (Chrome OS GPIO assignments)
184 ================================= 185 =================================
185 This control method returns information about 186 This control method returns information about Chrome OS specific GPIO assignments for
186 Chrome OS hardware, so the kernel can directly 187 Chrome OS hardware, so the kernel can directly control that hardware.
187 188
188 Arguments: 189 Arguments:
189 ---------- 190 ----------
190 None 191 None
191 192
192 Result code: 193 Result code:
193 ------------ 194 ------------
194 .. code-block:: 195 .. code-block::
195 196
196 Package { 197 Package {
197 Package { 198 Package {
198 // First GPIO assignme 199 // First GPIO assignment
199 Signal Type //D 200 Signal Type //DWORD
200 Attributes //D 201 Attributes //DWORD
201 Controller Offset //D 202 Controller Offset //DWORD
202 Controller Name //A 203 Controller Name //ASCIIZ
203 }, 204 },
204 ... 205 ...
205 Package { 206 Package {
206 // Last GPIO assignmen 207 // Last GPIO assignment
207 Signal Type //D 208 Signal Type //DWORD
208 Attributes //D 209 Attributes //DWORD
209 Controller Offset //D 210 Controller Offset //DWORD
210 Controller Name //A 211 Controller Name //ASCIIZ
211 } 212 }
212 } 213 }
213 214
214 Where ASCIIZ means a null-terminated ASCII str 215 Where ASCIIZ means a null-terminated ASCII string.
215 216
216 .. flat-table:: 217 .. flat-table::
217 :widths: 1 1 2 218 :widths: 1 1 2
218 :header-rows: 1 219 :header-rows: 1
219 220
220 * - Field 221 * - Field
221 - Format 222 - Format
222 - Description 223 - Description
223 224
224 * - Signal Type 225 * - Signal Type
225 - DWORD 226 - DWORD
226 - Type of GPIO signal 227 - Type of GPIO signal
227 228
228 - 0x00000001 - Recovery button 229 - 0x00000001 - Recovery button
229 - 0x00000002 - Developer mode switch 230 - 0x00000002 - Developer mode switch
230 - 0x00000003 - Firmware write protectio 231 - 0x00000003 - Firmware write protection switch
231 - 0x00000100 - Debug header GPIO 0 232 - 0x00000100 - Debug header GPIO 0
232 - ... 233 - ...
233 - 0x000001FF - Debug header GPIO 255 234 - 0x000001FF - Debug header GPIO 255
234 235
235 Other values are reserved. 236 Other values are reserved.
236 237
237 * - Attributes 238 * - Attributes
238 - DWORD 239 - DWORD
239 - Signal attributes as bitfields: 240 - Signal attributes as bitfields:
240 241
241 - 0x00000001 - Signal is active-high (f 242 - 0x00000001 - Signal is active-high (for button, a GPIO value
242 of 1 means the button is pressed; for 243 of 1 means the button is pressed; for switches, a GPIO value
243 of 1 means the switch is enabled). If 244 of 1 means the switch is enabled). If this bit is 0, the signal
244 is active low. Set to 0 for debug hea 245 is active low. Set to 0 for debug header GPIOs.
245 246
246 * - Controller Offset 247 * - Controller Offset
247 - DWORD 248 - DWORD
248 - GPIO number on the specified controller 249 - GPIO number on the specified controller.
249 250
250 * - Controller Name 251 * - Controller Name
251 - ASCIIZ 252 - ASCIIZ
252 - Name of the controller for the GPIO. 253 - Name of the controller for the GPIO.
253 Currently supported names: 254 Currently supported names:
254 "NM10" - Intel NM10 chip 255 "NM10" - Intel NM10 chip
255 256
256 VBNV (Chrome OS NVRAM locations) 257 VBNV (Chrome OS NVRAM locations)
257 ================================ 258 ================================
258 This control method returns information about 259 This control method returns information about the NVRAM (CMOS) locations used to
259 communicate with the BIOS. 260 communicate with the BIOS.
260 261
261 Arguments: 262 Arguments:
262 ---------- 263 ----------
263 None 264 None
264 265
265 Result code: 266 Result code:
266 ------------ 267 ------------
267 .. code-block:: 268 .. code-block::
268 269
269 Package { 270 Package {
270 NV Storage Block Offset //DWO 271 NV Storage Block Offset //DWORD
271 NV Storage Block Size //DWO 272 NV Storage Block Size //DWORD
272 } 273 }
273 274
274 .. flat-table:: 275 .. flat-table::
275 :widths: 1 1 2 276 :widths: 1 1 2
276 :header-rows: 1 277 :header-rows: 1
277 278
278 * - Field 279 * - Field
279 - Format 280 - Format
280 - Description 281 - Description
281 282
282 * - NV Storage Block Offset 283 * - NV Storage Block Offset
283 - DWORD 284 - DWORD
284 - Offset in CMOS bank 0 of the verified b 285 - Offset in CMOS bank 0 of the verified boot non-volatile storage block, counting from
285 the first writable CMOS byte (that is, 286 the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of
286 clock data). 287 clock data).
287 288
288 * - NV Storage Block Size 289 * - NV Storage Block Size
289 - DWORD 290 - DWORD
290 - Size in bytes of the verified boot non- 291 - Size in bytes of the verified boot non-volatile storage block.
291 292
292 FMAP (Chrome OS flashmap address) 293 FMAP (Chrome OS flashmap address)
293 ================================= 294 =================================
294 This control method returns the physical memor 295 This control method returns the physical memory address of the start of the main processor
295 firmware flashmap. 296 firmware flashmap.
296 297
297 Arguments: 298 Arguments:
298 ---------- 299 ----------
299 None 300 None
300 301
301 NoneResult code: 302 NoneResult code:
302 ---------------- 303 ----------------
303 A DWORD containing the physical memory address 304 A DWORD containing the physical memory address of the start of the main processor firmware
304 flashmap. 305 flashmap.
305 306
306 VDTA (Chrome OS verified boot data) 307 VDTA (Chrome OS verified boot data)
307 =================================== 308 ===================================
308 This control method returns the verified boot 309 This control method returns the verified boot data block shared between the firmware
309 verification step and the kernel verification 310 verification step and the kernel verification step.
310 311
311 Arguments: 312 Arguments:
312 ---------- 313 ----------
313 None 314 None
314 315
315 Result code: 316 Result code:
316 ------------ 317 ------------
317 A buffer containing the verified boot data blo 318 A buffer containing the verified boot data block.
318 319
319 MECK (Management Engine Checksum) 320 MECK (Management Engine Checksum)
320 ================================= 321 =================================
321 This control method returns the SHA-1 or SHA-2 322 This control method returns the SHA-1 or SHA-256 hash that is read out of the Management
322 Engine extended registers during boot. The has 323 Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that
323 the ME firmware has not changed. If Management 324 the ME firmware has not changed. If Management Engine is not present, or if the firmware was
324 unable to read the extended registers, this bu 325 unable to read the extended registers, this buffer can be zero.
325 326
326 Arguments: 327 Arguments:
327 ---------- 328 ----------
328 None 329 None
329 330
330 Result code: 331 Result code:
331 ------------ 332 ------------
332 A buffer containing the ME hash. 333 A buffer containing the ME hash.
333 334
334 MLST (Chrome OS method list) 335 MLST (Chrome OS method list)
335 ============================ 336 ============================
336 This control method returns a list of the othe 337 This control method returns a list of the other control methods supported by the Chrome OS
337 hardware device. 338 hardware device.
338 339
339 Arguments: 340 Arguments:
340 ---------- 341 ----------
341 None 342 None
342 343
343 Result code: 344 Result code:
344 ------------ 345 ------------
345 A package containing a list of null-terminated 346 A package containing a list of null-terminated ASCII strings, one for each control method
346 supported by the Chrome OS hardware device, no 347 supported by the Chrome OS hardware device, not including the MLST method itself.
347 For this version of the specification, the res 348 For this version of the specification, the result is:
348 349
349 .. code-block:: 350 .. code-block::
350 351
351 Package { 352 Package {
352 "CHSW", 353 "CHSW",
353 "FWID", 354 "FWID",
354 "HWID", 355 "HWID",
355 "FRID", 356 "FRID",
356 "BINF", 357 "BINF",
357 "GPIO", 358 "GPIO",
358 "VBNV", 359 "VBNV",
359 "FMAP", 360 "FMAP",
360 "VDTA", 361 "VDTA",
361 "MECK" 362 "MECK"
362 } 363 }
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