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2 Intel INT3496 ACPI device extcon driver docume 2 Intel INT3496 ACPI device extcon driver documentation
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4 4
5 The Intel INT3496 ACPI device extcon driver is 5 The Intel INT3496 ACPI device extcon driver is a driver for ACPI
6 devices with an acpi-id of INT3496, such as fo 6 devices with an acpi-id of INT3496, such as found for example on
7 Intel Baytrail and Cherrytrail tablets. 7 Intel Baytrail and Cherrytrail tablets.
8 8
9 This ACPI device describes how the OS can read 9 This ACPI device describes how the OS can read the id-pin of the devices'
10 USB-otg port, as well as how it optionally can 10 USB-otg port, as well as how it optionally can enable Vbus output on the
11 otg port and how it can optionally control the 11 otg port and how it can optionally control the muxing of the data pins
12 between an USB host and an USB peripheral cont 12 between an USB host and an USB peripheral controller.
13 13
14 The ACPI devices exposes this functionality by 14 The ACPI devices exposes this functionality by returning an array with up
15 to 3 gpio descriptors from its ACPI _CRS (Curr 15 to 3 gpio descriptors from its ACPI _CRS (Current Resource Settings) call:
16 16
17 ======= ===================================== 17 ======= =====================================================================
18 Index 0 The input gpio for the id-pin, this i 18 Index 0 The input gpio for the id-pin, this is always present and valid
19 Index 1 The output gpio for enabling Vbus out 19 Index 1 The output gpio for enabling Vbus output from the device to the otg
20 port, write 1 to enable the Vbus outp 20 port, write 1 to enable the Vbus output (this gpio descriptor may
21 be absent or invalid) 21 be absent or invalid)
22 Index 2 The output gpio for muxing of the dat 22 Index 2 The output gpio for muxing of the data pins between the USB host and
23 the USB peripheral controller, write 23 the USB peripheral controller, write 1 to mux to the peripheral
24 controller 24 controller
25 ======= ===================================== 25 ======= =====================================================================
26 26
27 There is a mapping between indices and GPIO co 27 There is a mapping between indices and GPIO connection IDs as follows
28 28
29 ======= ======= 29 ======= =======
30 id index 0 30 id index 0
31 vbus index 1 31 vbus index 1
32 mux index 2 32 mux index 2
33 ======= ======= 33 ======= =======
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