1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 =========================== 3 ===========================
4 Low Power Idle Table (LPIT) 4 Low Power Idle Table (LPIT)
5 =========================== 5 ===========================
6 6
7 To enumerate platform Low Power Idle states, I 7 To enumerate platform Low Power Idle states, Intel platforms are using
8 “Low Power Idle Table” (LPIT). More detail 8 “Low Power Idle Table” (LPIT). More details about this table can be
9 downloaded from: 9 downloaded from:
10 https://www.uefi.org/sites/default/files/resou !! 10 http://www.uefi.org/sites/default/files/resources/Intel_ACPI_Low_Power_S0_Idle.pdf
11 11
12 Residencies for each low power state can be re 12 Residencies for each low power state can be read via FFH
13 (Function fixed hardware) or a memory mapped i 13 (Function fixed hardware) or a memory mapped interface.
14 14
15 On platforms supporting S0ix sleep states, the 15 On platforms supporting S0ix sleep states, there can be two types of
16 residencies: 16 residencies:
17 17
18 - CPU PKG C10 (Read via FFH interface) 18 - CPU PKG C10 (Read via FFH interface)
19 - Platform Controller Hub (PCH) SLP_S0 (Read 19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
20 20
21 The following attributes are added dynamically 21 The following attributes are added dynamically to the cpuidle
22 sysfs attribute group:: 22 sysfs attribute group::
23 23
24 /sys/devices/system/cpu/cpuidle/low_power_id 24 /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
25 /sys/devices/system/cpu/cpuidle/low_power_id 25 /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
26 26
27 The "low_power_idle_cpu_residency_us" attribut 27 The "low_power_idle_cpu_residency_us" attribute shows time spent
28 by the CPU package in PKG C10 28 by the CPU package in PKG C10
29 29
30 The "low_power_idle_system_residency_us" attri 30 The "low_power_idle_system_residency_us" attribute shows SLP_S0
31 residency, or system time spent with the SLP_S 31 residency, or system time spent with the SLP_S0# signal asserted.
32 This is the lowest possible system power state 32 This is the lowest possible system power state, achieved only when CPU is in
33 PKG C10 and all functional blocks in PCH are i 33 PKG C10 and all functional blocks in PCH are in a low power state.
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