1 ========================= 2 I915 DG1/LMEM RFC Section 3 ========================= 4 5 Upstream plan 6 ============= 7 For upstream the overall plan for landing all 8 real, with all the uAPI bits is: 9 10 * Merge basic HW enabling of DG1(still without 11 * Merge the uAPI bits behind special CONFIG_BR 12 * At this point we can still make chan 13 start running IGTs which can utilize 14 * Convert over to TTM, make sure it all keeps 15 * TTM shrinker for discrete 16 * dma_resv_lockitem for full dma_resv_ 17 * Use TTM CPU pagefault handler 18 * Route shmem backend over to TTM SYST 19 * TTM purgeable object support 20 * Move i915 buddy allocator over to TT 21 * Send RFC(with mesa-dev on cc) for final sign 22 * Add pciid for DG1 and turn on uAPI for real
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