1 ==========================
2 I915 Small BAR RFC Section
3 ==========================
4 Starting from DG2 we will have resizable BAR s
5 I915_MEMORY_CLASS_DEVICE), but in some cases t
6 smaller than the total probed_size. In such ca
7 I915_MEMORY_CLASS_DEVICE will be CPU accessibl
8 while the remainder is only accessible via the
9
10 I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS flag
11 ----------------------------------------------
12 New gem_create_ext flag to tell the kernel tha
13 This becomes important when placing an object
14 underneath the device has a small BAR, meaning
15 accessible. Without this flag the kernel will
16 required, and prioritize using the non-CPU vis
17 I915_MEMORY_CLASS_DEVICE.
18
19 .. kernel-doc:: Documentation/gpu/rfc/i915_sma
20 :functions: __drm_i915_gem_create_ext
21
22 probed_cpu_visible_size attribute
23 ---------------------------------
24 New struct__drm_i915_memory_region attribute w
25 CPU accessible portion, for the particular reg
26 applicable for I915_MEMORY_CLASS_DEVICE. We al
27 unallocated_cpu_visible_size, alongside the un
28
29 Vulkan will need this as part of creating a se
30 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT set, to re
31 where the total size of the heap needs to be k
32 give a rough estimate of how memory can potent
33
34 .. kernel-doc:: Documentation/gpu/rfc/i915_sma
35 :functions: __drm_i915_memory_region_info
36
37 Error Capture restrictions
38 --------------------------
39 With error capture we have two new restriction
40
41 1) Error capture is best effort on small B
42 CPU accessible, at the time of capture, th
43 trying to capture them.
44
45 2) On discrete and newer integrated platfo
46 on recoverable contexts. In the future the
47 error capture, when for example something
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