~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/hwmon/ina209.rst

Version: ~ [ linux-6.11.5 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.58 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.114 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.169 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.228 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.284 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.322 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.9 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /Documentation/hwmon/ina209.rst (Architecture ppc) and /Documentation/hwmon/ina209.rst (Architecture m68k)


  1 Kernel driver ina209                                1 Kernel driver ina209
  2 ====================                                2 ====================
  3                                                     3 
  4 Supported chips:                                    4 Supported chips:
  5                                                     5 
  6   * Burr-Brown / Texas Instruments INA209           6   * Burr-Brown / Texas Instruments INA209
  7                                                     7 
  8     Prefix: 'ina209'                                8     Prefix: 'ina209'
  9                                                     9 
 10     Addresses scanned: -                           10     Addresses scanned: -
 11                                                    11 
 12     Datasheet:                                     12     Datasheet:
 13         https://www.ti.com/lit/gpn/ina209          13         https://www.ti.com/lit/gpn/ina209
 14                                                    14 
 15 Author:                                            15 Author:
 16         - Paul Hays <Paul.Hays@cattail.ca>          16         - Paul Hays <Paul.Hays@cattail.ca>
 17         - Ira W. Snyder <iws@ovro.caltech.edu>      17         - Ira W. Snyder <iws@ovro.caltech.edu>
 18         - Guenter Roeck <linux@roeck-us.net>        18         - Guenter Roeck <linux@roeck-us.net>
 19                                                    19 
 20                                                    20 
 21 Description                                        21 Description
 22 -----------                                        22 -----------
 23                                                    23 
 24 The TI / Burr-Brown INA209 monitors voltage, c     24 The TI / Burr-Brown INA209 monitors voltage, current, and power on the high side
 25 of a D.C. power supply. It can perform measure     25 of a D.C. power supply. It can perform measurements and calculations in the
 26 background to supply readings at any time. It      26 background to supply readings at any time. It includes a programmable
 27 calibration multiplier to scale the displayed      27 calibration multiplier to scale the displayed current and power values.
 28                                                    28 
 29                                                    29 
 30 Sysfs entries                                      30 Sysfs entries
 31 -------------                                      31 -------------
 32                                                    32 
 33 The INA209 chip is highly configurable both vi     33 The INA209 chip is highly configurable both via hardwiring and via
 34 the I2C bus. See the datasheet for details.        34 the I2C bus. See the datasheet for details.
 35                                                    35 
 36 This tries to expose most monitoring features      36 This tries to expose most monitoring features of the hardware via
 37 sysfs. It does not support every feature of th     37 sysfs. It does not support every feature of this chip.
 38                                                    38 
 39 ======================= ======================     39 ======================= =======================================================
 40 in0_input               shunt voltage (mV)         40 in0_input               shunt voltage (mV)
 41 in0_input_highest       shunt voltage historic     41 in0_input_highest       shunt voltage historical maximum reading (mV)
 42 in0_input_lowest        shunt voltage historic     42 in0_input_lowest        shunt voltage historical minimum reading (mV)
 43 in0_reset_history       reset shunt voltage hi     43 in0_reset_history       reset shunt voltage history
 44 in0_max                 shunt voltage max alar     44 in0_max                 shunt voltage max alarm limit (mV)
 45 in0_min                 shunt voltage min alar     45 in0_min                 shunt voltage min alarm limit (mV)
 46 in0_crit_max            shunt voltage crit max     46 in0_crit_max            shunt voltage crit max alarm limit (mV)
 47 in0_crit_min            shunt voltage crit min     47 in0_crit_min            shunt voltage crit min alarm limit (mV)
 48 in0_max_alarm           shunt voltage max alar     48 in0_max_alarm           shunt voltage max alarm limit exceeded
 49 in0_min_alarm           shunt voltage min alar     49 in0_min_alarm           shunt voltage min alarm limit exceeded
 50 in0_crit_max_alarm      shunt voltage crit max     50 in0_crit_max_alarm      shunt voltage crit max alarm limit exceeded
 51 in0_crit_min_alarm      shunt voltage crit min     51 in0_crit_min_alarm      shunt voltage crit min alarm limit exceeded
 52                                                    52 
 53 in1_input               bus voltage (mV)           53 in1_input               bus voltage (mV)
 54 in1_input_highest       bus voltage historical     54 in1_input_highest       bus voltage historical maximum reading (mV)
 55 in1_input_lowest        bus voltage historical     55 in1_input_lowest        bus voltage historical minimum reading (mV)
 56 in1_reset_history       reset bus voltage hist     56 in1_reset_history       reset bus voltage history
 57 in1_max                 bus voltage max alarm      57 in1_max                 bus voltage max alarm limit (mV)
 58 in1_min                 bus voltage min alarm      58 in1_min                 bus voltage min alarm limit (mV)
 59 in1_crit_max            bus voltage crit max a     59 in1_crit_max            bus voltage crit max alarm limit (mV)
 60 in1_crit_min            bus voltage crit min a     60 in1_crit_min            bus voltage crit min alarm limit (mV)
 61 in1_max_alarm           bus voltage max alarm      61 in1_max_alarm           bus voltage max alarm limit exceeded
 62 in1_min_alarm           bus voltage min alarm      62 in1_min_alarm           bus voltage min alarm limit exceeded
 63 in1_crit_max_alarm      bus voltage crit max a     63 in1_crit_max_alarm      bus voltage crit max alarm limit exceeded
 64 in1_crit_min_alarm      bus voltage crit min a     64 in1_crit_min_alarm      bus voltage crit min alarm limit exceeded
 65                                                    65 
 66 power1_input            power measurement (uW)     66 power1_input            power measurement (uW)
 67 power1_input_highest    power historical maxim     67 power1_input_highest    power historical maximum reading (uW)
 68 power1_reset_history    reset power history        68 power1_reset_history    reset power history
 69 power1_max              power max alarm limit      69 power1_max              power max alarm limit (uW)
 70 power1_crit             power crit alarm limit     70 power1_crit             power crit alarm limit (uW)
 71 power1_max_alarm        power max alarm limit      71 power1_max_alarm        power max alarm limit exceeded
 72 power1_crit_alarm       power crit alarm limit     72 power1_crit_alarm       power crit alarm limit exceeded
 73                                                    73 
 74 curr1_input             current measurement (m     74 curr1_input             current measurement (mA)
 75                                                    75 
 76 update_interval         data conversion time;      76 update_interval         data conversion time; affects number of samples used
 77                         to average results for     77                         to average results for shunt and bus voltages.
 78 ======================= ======================     78 ======================= =======================================================
 79                                                    79 
 80 General Remarks                                    80 General Remarks
 81 ---------------                                    81 ---------------
 82                                                    82 
 83 The power and current registers in this chip r     83 The power and current registers in this chip require that the calibration
 84 register is programmed correctly before they a     84 register is programmed correctly before they are used. Normally this is expected
 85 to be done in the BIOS. In the absence of BIOS     85 to be done in the BIOS. In the absence of BIOS programming, the shunt resistor
 86 voltage can be provided using platform data. T     86 voltage can be provided using platform data. The driver uses platform data from
 87 the ina2xx driver for this purpose. If calibra     87 the ina2xx driver for this purpose. If calibration register data is not provided
 88 via platform data, the driver checks if the ca     88 via platform data, the driver checks if the calibration register has been
 89 programmed (ie has a value not equal to zero).     89 programmed (ie has a value not equal to zero). If so, this value is retained.
 90 Otherwise, a default value reflecting a shunt      90 Otherwise, a default value reflecting a shunt resistor value of 10 mOhm is
 91 programmed into the calibration register.          91 programmed into the calibration register.
 92                                                    92 
 93                                                    93 
 94 Output Pins                                        94 Output Pins
 95 -----------                                        95 -----------
 96                                                    96 
 97 Output pin programming is a board feature whic     97 Output pin programming is a board feature which depends on the BIOS. It is
 98 outside the scope of a hardware monitoring dri     98 outside the scope of a hardware monitoring driver to enable or disable output
 99 pins.                                              99 pins.
                                                      

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php