1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 Kernel driver max16601 3 Kernel driver max16601
4 ====================== 4 ======================
5 5
6 Supported chips: 6 Supported chips:
7 7
8 * Maxim MAX16508 8 * Maxim MAX16508
9 9
10 Prefix: 'max16508' 10 Prefix: 'max16508'
11 11
12 Addresses scanned: - 12 Addresses scanned: -
13 13
14 Datasheet: Not published 14 Datasheet: Not published
15 15
16 * Maxim MAX16600 16 * Maxim MAX16600
17 17
18 Prefix: 'max16600' 18 Prefix: 'max16600'
19 19
20 Addresses scanned: - 20 Addresses scanned: -
21 21
22 Datasheet: Not published 22 Datasheet: Not published
23 23
24 * Maxim MAX16601 24 * Maxim MAX16601
25 25
26 Prefix: 'max16601' 26 Prefix: 'max16601'
27 27
28 Addresses scanned: - 28 Addresses scanned: -
29 29
30 Datasheet: Not published 30 Datasheet: Not published
31 31
32 * Maxim MAX16602 32 * Maxim MAX16602
33 33
34 Prefix: 'max16602' 34 Prefix: 'max16602'
35 35
36 Addresses scanned: - 36 Addresses scanned: -
37 37
38 Datasheet: https://datasheets.maximintegra 38 Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX16602.pdf
39 39
40 Author: Guenter Roeck <linux@roeck-us.net> 40 Author: Guenter Roeck <linux@roeck-us.net>
41 41
42 42
43 Description 43 Description
44 ----------- 44 -----------
45 45
46 This driver supports the MAX16508 VR13 Dual-Ou 46 This driver supports the MAX16508 VR13 Dual-Output Voltage Regulator
47 as well as the MAX16600, MAX16601, and MAX1660 47 as well as the MAX16600, MAX16601, and MAX16602 VR13.HC Dual-Output
48 Voltage Regulator chipsets. 48 Voltage Regulator chipsets.
49 49
50 The driver is a client driver to the core PMBu 50 The driver is a client driver to the core PMBus driver.
51 Please see Documentation/hwmon/pmbus.rst for d 51 Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
52 52
53 53
54 Usage Notes 54 Usage Notes
55 ----------- 55 -----------
56 56
57 This driver does not auto-detect devices. You 57 This driver does not auto-detect devices. You will have to instantiate the
58 devices explicitly. Please see Documentation/i 58 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
59 details. 59 details.
60 60
61 61
62 Platform data support 62 Platform data support
63 --------------------- 63 ---------------------
64 64
65 The driver supports standard PMBus driver plat 65 The driver supports standard PMBus driver platform data.
66 66
67 67
68 Sysfs entries 68 Sysfs entries
69 ------------- 69 -------------
70 70
71 The following attributes are supported. 71 The following attributes are supported.
72 72
73 =============================== ============== 73 =============================== ===============================================
74 in1_label "vin1" 74 in1_label "vin1"
75 in1_input VCORE input vo 75 in1_input VCORE input voltage.
76 in1_alarm Input voltage 76 in1_alarm Input voltage alarm.
77 77
78 in2_label "vout1" 78 in2_label "vout1"
79 in2_input VCORE output v 79 in2_input VCORE output voltage.
80 in2_alarm Output voltage 80 in2_alarm Output voltage alarm.
81 81
82 curr1_label "iin1" 82 curr1_label "iin1"
83 curr1_input VCORE input cu 83 curr1_input VCORE input current, derived from duty cycle
84 and output cur 84 and output current.
85 curr1_max Maximum input 85 curr1_max Maximum input current.
86 curr1_max_alarm Current high a 86 curr1_max_alarm Current high alarm.
87 87
88 curr[P+2]_label "iin1.P" 88 curr[P+2]_label "iin1.P"
89 curr[P+2]_input VCORE phase P 89 curr[P+2]_input VCORE phase P input current.
90 90
91 curr[N+2]_label "iin2" 91 curr[N+2]_label "iin2"
92 curr[N+2]_input VCORE input cu 92 curr[N+2]_input VCORE input current, derived from sensor
93 element. 93 element.
94 'N' is the num 94 'N' is the number of enabled/populated phases.
95 95
96 curr[N+3]_label "iin3" 96 curr[N+3]_label "iin3"
97 curr[N+3]_input VSA input curr 97 curr[N+3]_input VSA input current.
98 98
99 curr[N+4]_label "iout1" 99 curr[N+4]_label "iout1"
100 curr[N+4]_input VCORE output c 100 curr[N+4]_input VCORE output current.
101 curr[N+4]_crit Critical outpu 101 curr[N+4]_crit Critical output current.
102 curr[N+4]_crit_alarm Output current 102 curr[N+4]_crit_alarm Output current critical alarm.
103 curr[N+4]_max Maximum output 103 curr[N+4]_max Maximum output current.
104 curr[N+4]_max_alarm Output current 104 curr[N+4]_max_alarm Output current high alarm.
105 105
106 curr[N+P+5]_label "iout1.P" 106 curr[N+P+5]_label "iout1.P"
107 curr[N+P+5]_input VCORE phase P 107 curr[N+P+5]_input VCORE phase P output current.
108 108
109 curr[2*N+5]_label "iout3" 109 curr[2*N+5]_label "iout3"
110 curr[2*N+5]_input VSA output cur 110 curr[2*N+5]_input VSA output current.
111 curr[2*N+5]_highest Historical max 111 curr[2*N+5]_highest Historical maximum VSA output current.
112 curr[2*N+5]_reset_history Write any valu 112 curr[2*N+5]_reset_history Write any value to reset curr21_highest.
113 curr[2*N+5]_crit Critical outpu 113 curr[2*N+5]_crit Critical output current.
114 curr[2*N+5]_crit_alarm Output current 114 curr[2*N+5]_crit_alarm Output current critical alarm.
115 curr[2*N+5]_max Maximum output 115 curr[2*N+5]_max Maximum output current.
116 curr[2*N+5]_max_alarm Output current 116 curr[2*N+5]_max_alarm Output current high alarm.
117 117
118 power1_label "pin1" 118 power1_label "pin1"
119 power1_input Input power, d 119 power1_input Input power, derived from duty cycle and output
120 current. 120 current.
121 power1_alarm Input power al 121 power1_alarm Input power alarm.
122 122
123 power2_label "pin2" 123 power2_label "pin2"
124 power2_input Input power, d 124 power2_input Input power, derived from input current sensor.
125 125
126 power3_label "pout" 126 power3_label "pout"
127 power3_input Output power. 127 power3_input Output power.
128 128
129 temp1_input VCORE temperat 129 temp1_input VCORE temperature.
130 temp1_crit Critical high 130 temp1_crit Critical high temperature.
131 temp1_crit_alarm Chip temperatu 131 temp1_crit_alarm Chip temperature critical high alarm.
132 temp1_max Maximum temper 132 temp1_max Maximum temperature.
133 temp1_max_alarm Chip temperatu 133 temp1_max_alarm Chip temperature high alarm.
134 134
135 temp2_input TSENSE_0 tempe 135 temp2_input TSENSE_0 temperature
136 temp3_input TSENSE_1 tempe 136 temp3_input TSENSE_1 temperature
137 temp4_input TSENSE_2 tempe 137 temp4_input TSENSE_2 temperature
138 temp5_input TSENSE_3 tempe 138 temp5_input TSENSE_3 temperature
139 139
140 temp6_input VSA temperatur 140 temp6_input VSA temperature.
141 temp6_crit Critical high 141 temp6_crit Critical high temperature.
142 temp6_crit_alarm Chip temperatu 142 temp6_crit_alarm Chip temperature critical high alarm.
143 temp6_max Maximum temper 143 temp6_max Maximum temperature.
144 temp6_max_alarm Chip temperatu 144 temp6_max_alarm Chip temperature high alarm.
145 =============================== ============== 145 =============================== ===============================================
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