1 .. SPDX-License-Identifier: GPL-2.0-or-later 1 .. SPDX-License-Identifier: GPL-2.0-or-later
2 2
3 Kernel driver sbtsi_temp 3 Kernel driver sbtsi_temp
4 ======================== 4 ========================
5 5
6 Supported hardware: 6 Supported hardware:
7 7
8 * Sideband interface (SBI) Temperature Senso 8 * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
9 compliant AMD SoC temperature device. 9 compliant AMD SoC temperature device.
10 10
11 Prefix: 'sbtsi_temp' 11 Prefix: 'sbtsi_temp'
12 12
13 Addresses scanned: This driver doesn't sup 13 Addresses scanned: This driver doesn't support address scanning.
14 14
15 To instantiate this driver on an AMD CPU w 15 To instantiate this driver on an AMD CPU with SB-TSI
16 support, the i2c bus number would be the b 16 support, the i2c bus number would be the bus connected from the board
17 management controller (BMC) to the CPU. Th 17 management controller (BMC) to the CPU. The i2c address is specified in
18 Section 6.3.1 of the SoC register referenc 18 Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
19 98h for socket 0 and 90h for socket 1, but 19 98h for socket 0 and 90h for socket 1, but it could vary based on hardware
20 address select pins. 20 address select pins.
21 21
22 Datasheet: The SB-TSI interface and protoc 22 Datasheet: The SB-TSI interface and protocol is available as part of
23 the open source SoC register re 23 the open source SoC register reference at:
24 24
25 https://www.amd.com/system/file 25 https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
26 26
27 The Advanced Platform Managemen 27 The Advanced Platform Management Link (APML) Specification is
28 available at: 28 available at:
29 29
30 http://developer.amd.com/wordpr 30 http://developer.amd.com/wordpress/media/2012/10/41918.pdf
31 31
32 Author: Kun Yi <kunyi@google.com> 32 Author: Kun Yi <kunyi@google.com>
33 33
34 Description 34 Description
35 ----------- 35 -----------
36 36
37 The SBI temperature sensor interface (SB-TSI) 37 The SBI temperature sensor interface (SB-TSI) is an emulation of the software
38 and physical interface of a typical 8-pin remo 38 and physical interface of a typical 8-pin remote temperature sensor (RTS) on
39 AMD SoCs. It implements one temperature sensor 39 AMD SoCs. It implements one temperature sensor with readings and limit
40 registers encode the temperature in increments 40 registers encode the temperature in increments of 0.125 from 0 to 255.875.
41 Limits can be set through the writable thresho 41 Limits can be set through the writable thresholds, and if reached will trigger
42 corresponding alert signals. 42 corresponding alert signals.
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