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Linux/Documentation/hwmon/smsc47b397.rst

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Diff markup

Differences between /Documentation/hwmon/smsc47b397.rst (Architecture alpha) and /Documentation/hwmon/smsc47b397.rst (Architecture i386)


  1 Kernel driver smsc47b397                            1 Kernel driver smsc47b397
  2 ========================                            2 ========================
  3                                                     3 
  4 Supported chips:                                    4 Supported chips:
  5                                                     5 
  6   * SMSC LPC47B397-NC                               6   * SMSC LPC47B397-NC
  7                                                     7 
  8   * SMSC SCH5307-NS                                 8   * SMSC SCH5307-NS
  9                                                     9 
 10   * SMSC SCH5317                                   10   * SMSC SCH5317
 11                                                    11 
 12     Prefix: 'smsc47b397'                           12     Prefix: 'smsc47b397'
 13                                                    13 
 14     Addresses scanned: none, address read from     14     Addresses scanned: none, address read from Super I/O config space
 15                                                    15 
 16     Datasheet: In this file                        16     Datasheet: In this file
 17                                                    17 
 18 Authors:                                           18 Authors:
 19                                                    19 
 20        - Mark M. Hoffman <mhoffman@lightlink.co     20        - Mark M. Hoffman <mhoffman@lightlink.com>
 21        - Utilitek Systems, Inc.                    21        - Utilitek Systems, Inc.
 22                                                    22 
 23 November 23, 2004                                  23 November 23, 2004
 24                                                    24 
 25 The following specification describes the SMSC     25 The following specification describes the SMSC LPC47B397-NC [1]_ sensor chip
 26 (for which there is no public datasheet availa     26 (for which there is no public datasheet available). This document was
 27 provided by Craig Kelly (In-Store Broadcast Ne     27 provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected
 28 by Mark M. Hoffman <mhoffman@lightlink.com>.        28 by Mark M. Hoffman <mhoffman@lightlink.com>.
 29                                                    29 
 30 .. [1] And SMSC SCH5307-NS and SCH5317, which      30 .. [1] And SMSC SCH5307-NS and SCH5317, which have different device IDs but are
 31        otherwise compatible.                       31        otherwise compatible.
 32                                                    32 
 33 ----------------------------------------------     33 -------------------------------------------------------------------------
 34                                                    34 
 35 Methods for detecting the HP SIO and reading t     35 Methods for detecting the HP SIO and reading the thermal data on a dc7100
 36 ----------------------------------------------     36 -------------------------------------------------------------------------
 37                                                    37 
 38 The thermal information on the dc7100 is conta     38 The thermal information on the dc7100 is contained in the SIO Hardware Monitor
 39 (HWM). The information is accessed through an      39 (HWM). The information is accessed through an index/data pair. The index/data
 40 pair is located at the HWM Base Address + 0 an     40 pair is located at the HWM Base Address + 0 and the HWM Base Address + 1. The
 41 HWM Base address can be obtained from Logical      41 HWM Base address can be obtained from Logical Device 8, registers 0x60 (MSB)
 42 and 0x61 (LSB). Currently we are using 0x480 f     42 and 0x61 (LSB). Currently we are using 0x480 for the HWM Base Address and
 43 0x480 and 0x481 for the index/data pair.           43 0x480 and 0x481 for the index/data pair.
 44                                                    44 
 45 Reading temperature information.                   45 Reading temperature information.
 46 The temperature information is located in the      46 The temperature information is located in the following registers:
 47                                                    47 
 48 =============== ======= ======================     48 =============== ======= =======================================================
 49 Temp1           0x25    (Currently, this refle     49 Temp1           0x25    (Currently, this reflects the CPU temp on all systems).
 50 Temp2           0x26                               50 Temp2           0x26
 51 Temp3           0x27                               51 Temp3           0x27
 52 Temp4           0x80                               52 Temp4           0x80
 53 =============== ======= ======================     53 =============== ======= =======================================================
 54                                                    54 
 55 Programming Example                                55 Programming Example
 56 The following is an example of how to read the     56 The following is an example of how to read the HWM temperature registers::
 57                                                    57 
 58         MOV     DX,480H                            58         MOV     DX,480H
 59         MOV     AX,25H                             59         MOV     AX,25H
 60         OUT     DX,AL                              60         OUT     DX,AL
 61         MOV     DX,481H                            61         MOV     DX,481H
 62         IN      AL,DX                              62         IN      AL,DX
 63                                                    63 
 64 AL contains the data in hex, the temperature i     64 AL contains the data in hex, the temperature in Celsius is the decimal
 65 equivalent.                                        65 equivalent.
 66                                                    66 
 67 Ex: If AL contains 0x2A, the temperature is 42     67 Ex: If AL contains 0x2A, the temperature is 42 degrees C.
 68                                                    68 
 69 Reading tach information.                          69 Reading tach information.
 70 The fan speed information is located in the fo     70 The fan speed information is located in the following registers:
 71                                                    71 
 72 =============== ======= ======= ==============     72 =============== ======= ======= =================================
 73                 LSB     MSB                        73                 LSB     MSB
 74 Tach1           0x28    0x29    (Currently, th     74 Tach1           0x28    0x29    (Currently, this reflects the CPU
 75                                 fan speed on a     75                                 fan speed on all systems).
 76 Tach2           0x2A    0x2B                       76 Tach2           0x2A    0x2B
 77 Tach3           0x2C    0x2D                       77 Tach3           0x2C    0x2D
 78 Tach4           0x2E    0x2F                       78 Tach4           0x2E    0x2F
 79 =============== ======= ======= ==============     79 =============== ======= ======= =================================
 80                                                    80 
 81 .. Important::                                     81 .. Important::
 82                                                    82 
 83         Reading the tach LSB locks the tach MS     83         Reading the tach LSB locks the tach MSB.
 84         The LSB Must be read first.                84         The LSB Must be read first.
 85                                                    85 
 86 How to convert the tach reading to RPM             86 How to convert the tach reading to RPM
 87 --------------------------------------             87 --------------------------------------
 88                                                    88 
 89 The tach reading (TCount) is given by: (Tach M     89 The tach reading (TCount) is given by: (Tach MSB * 256) + (Tach LSB)
 90 The SIO counts the number of 90kHz (11.111us)      90 The SIO counts the number of 90kHz (11.111us) pulses per revolution.
 91 RPM = 60/(TCount * 11.111us)                       91 RPM = 60/(TCount * 11.111us)
 92                                                    92 
 93 Example::                                          93 Example::
 94                                                    94 
 95         Reg 0x28 = 0x9B                            95         Reg 0x28 = 0x9B
 96         Reg 0x29 = 0x08                            96         Reg 0x29 = 0x08
 97                                                    97 
 98 TCount = 0x89B = 2203                              98 TCount = 0x89B = 2203
 99                                                    99 
100 RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM       100 RPM = 60 / (2203 * 11.11111 E-6) = 2451 RPM
101                                                   101 
102 Obtaining the SIO version.                        102 Obtaining the SIO version.
103                                                   103 
104 Configuration Sequence                            104 Configuration Sequence
105 ----------------------                            105 ----------------------
106                                                   106 
107 To program the configuration registers, the fo    107 To program the configuration registers, the following sequence must be followed:
108 1. Enter Configuration Mode                       108 1. Enter Configuration Mode
109 2. Configure the Configuration Registers          109 2. Configure the Configuration Registers
110 3. Exit Configuration Mode.                       110 3. Exit Configuration Mode.
111                                                   111 
112 Enter Configuration Mode                          112 Enter Configuration Mode
113 ^^^^^^^^^^^^^^^^^^^^^^^^                          113 ^^^^^^^^^^^^^^^^^^^^^^^^
114                                                   114 
115 To place the chip into the Configuration State    115 To place the chip into the Configuration State The config key (0x55) is written
116 to the CONFIG PORT (0x2E).                        116 to the CONFIG PORT (0x2E).
117                                                   117 
118 Configuration Mode                                118 Configuration Mode
119 ^^^^^^^^^^^^^^^^^^                                119 ^^^^^^^^^^^^^^^^^^
120                                                   120 
121 In configuration mode, the INDEX PORT is locat    121 In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
122 the DATA PORT is at INDEX PORT address + 1.       122 the DATA PORT is at INDEX PORT address + 1.
123                                                   123 
124 The desired configuration registers are access    124 The desired configuration registers are accessed in two steps:
125                                                   125 
126 a.      Write the index of the Logical Device     126 a.      Write the index of the Logical Device Number Configuration Register
127         (i.e., 0x07) to the INDEX PORT and the    127         (i.e., 0x07) to the INDEX PORT and then write the number of the
128         desired logical device to the DATA POR    128         desired logical device to the DATA PORT.
129                                                   129 
130 b.      Write the address of the desired confi    130 b.      Write the address of the desired configuration register within the
131         logical device to the INDEX PORT and t    131         logical device to the INDEX PORT and then write or read the config-
132         uration register through the DATA PORT    132         uration register through the DATA PORT.
133                                                   133 
134 Note:                                             134 Note:
135         If accessing the Global Configuration     135         If accessing the Global Configuration Registers, step (a) is not required.
136                                                   136 
137 Exit Configuration Mode                           137 Exit Configuration Mode
138 ^^^^^^^^^^^^^^^^^^^^^^^                           138 ^^^^^^^^^^^^^^^^^^^^^^^
139                                                   139 
140 To exit the Configuration State the write 0xAA    140 To exit the Configuration State the write 0xAA to the CONFIG PORT (0x2E).
141 The chip returns to the RUN State.  (This is i    141 The chip returns to the RUN State.  (This is important).
142                                                   142 
143 Programming Example                               143 Programming Example
144 ^^^^^^^^^^^^^^^^^^^                               144 ^^^^^^^^^^^^^^^^^^^
145                                                   145 
146 The following is an example of how to read the    146 The following is an example of how to read the SIO Device ID located at 0x20:
147                                                   147 
148         ; ENTER CONFIGURATION MODE                148         ; ENTER CONFIGURATION MODE
149         MOV     DX,02EH                           149         MOV     DX,02EH
150         MOV     AX,055H                           150         MOV     AX,055H
151         OUT     DX,AL                             151         OUT     DX,AL
152         ; GLOBAL CONFIGURATION  REGISTER          152         ; GLOBAL CONFIGURATION  REGISTER
153         MOV     DX,02EH                           153         MOV     DX,02EH
154         MOV     AL,20H                            154         MOV     AL,20H
155         OUT     DX,AL                             155         OUT     DX,AL
156         ; READ THE DATA                           156         ; READ THE DATA
157         MOV     DX,02FH                           157         MOV     DX,02FH
158         IN      AL,DX                             158         IN      AL,DX
159         ; EXIT CONFIGURATION MODE                 159         ; EXIT CONFIGURATION MODE
160         MOV     DX,02EH                           160         MOV     DX,02EH
161         MOV     AX,0AAH                           161         MOV     AX,0AAH
162         OUT     DX,AL                             162         OUT     DX,AL
163                                                   163 
164 The registers of interest for identifying the     164 The registers of interest for identifying the SIO on the dc7100 are Device ID
165 (0x20) and Device Rev  (0x21).                    165 (0x20) and Device Rev  (0x21).
166                                                   166 
167 The Device ID will read 0x6F (0x81 for SCH5307    167 The Device ID will read 0x6F (0x81 for SCH5307-NS, and 0x85 for SCH5317)
168 The Device Rev currently reads 0x01               168 The Device Rev currently reads 0x01
169                                                   169 
170 Obtaining the HWM Base Address                    170 Obtaining the HWM Base Address
171 ------------------------------                    171 ------------------------------
172                                                   172 
173 The following is an example of how to read the    173 The following is an example of how to read the HWM Base Address located in
174 Logical Device 8::                                174 Logical Device 8::
175                                                   175 
176         ; ENTER CONFIGURATION MODE                176         ; ENTER CONFIGURATION MODE
177         MOV     DX,02EH                           177         MOV     DX,02EH
178         MOV     AX,055H                           178         MOV     AX,055H
179         OUT     DX,AL                             179         OUT     DX,AL
180         ; CONFIGURE REGISTER CRE0,                180         ; CONFIGURE REGISTER CRE0,
181         ; LOGICAL DEVICE 8                        181         ; LOGICAL DEVICE 8
182         MOV     DX,02EH                           182         MOV     DX,02EH
183         MOV     AL,07H                            183         MOV     AL,07H
184         OUT     DX,AL ;Point to LD# Config Reg    184         OUT     DX,AL ;Point to LD# Config Reg
185         MOV     DX,02FH                           185         MOV     DX,02FH
186         MOV     AL, 08H                           186         MOV     AL, 08H
187         OUT     DX,AL;Point to Logical Device     187         OUT     DX,AL;Point to Logical Device 8
188         ;                                         188         ;
189         MOV     DX,02EH                           189         MOV     DX,02EH
190         MOV     AL,60H                            190         MOV     AL,60H
191         OUT     DX,AL   ; Point to HWM Base Ad    191         OUT     DX,AL   ; Point to HWM Base Addr MSB
192         MOV     DX,02FH                           192         MOV     DX,02FH
193         IN      AL,DX   ; Get MSB of HWM Base     193         IN      AL,DX   ; Get MSB of HWM Base Addr
194         ; EXIT CONFIGURATION MODE                 194         ; EXIT CONFIGURATION MODE
195         MOV     DX,02EH                           195         MOV     DX,02EH
196         MOV     AX,0AAH                           196         MOV     AX,0AAH
197         OUT     DX,AL                             197         OUT     DX,AL
                                                      

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