1 Kernel driver smsc47m1 1 Kernel driver smsc47m1 2 ====================== 2 ====================== 3 3 4 Supported chips: 4 Supported chips: 5 5 6 * SMSC LPC47B27x, LPC47M112, LPC47M10x, LPC4 6 * SMSC LPC47B27x, LPC47M112, LPC47M10x, LPC47M13x, LPC47M14x, 7 7 8 LPC47M15x and LPC47M192 8 LPC47M15x and LPC47M192 9 9 10 Addresses scanned: none, address read from 10 Addresses scanned: none, address read from Super I/O config space 11 11 12 Prefix: 'smsc47m1' 12 Prefix: 'smsc47m1' 13 13 14 Datasheets: 14 Datasheets: 15 15 16 http://www.smsc.com/media/Downloads_Pu 16 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47b272.pdf 17 17 18 http://www.smsc.com/media/Downloads_Pu 18 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m10x.pdf 19 19 20 http://www.smsc.com/media/Downloads_Pu 20 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m112.pdf 21 21 22 http://www.smsc.com/ 22 http://www.smsc.com/ 23 23 24 * SMSC LPC47M292 24 * SMSC LPC47M292 25 25 26 Addresses scanned: none, address read from 26 Addresses scanned: none, address read from Super I/O config space 27 27 28 Prefix: 'smsc47m2' 28 Prefix: 'smsc47m2' 29 29 30 Datasheet: Not public 30 Datasheet: Not public 31 31 32 * SMSC LPC47M997 32 * SMSC LPC47M997 33 33 34 Addresses scanned: none, address read from 34 Addresses scanned: none, address read from Super I/O config space 35 35 36 Prefix: 'smsc47m1' 36 Prefix: 'smsc47m1' 37 37 38 Datasheet: none 38 Datasheet: none 39 39 40 40 41 41 42 Authors: 42 Authors: 43 43 44 - Mark D. Studebaker <mdsxyz123@yahoo.com> 44 - Mark D. Studebaker <mdsxyz123@yahoo.com>, 45 - With assistance from Bruce Allen <ballen 45 - With assistance from Bruce Allen <ballen@uwm.edu>, and his 46 fan.c program: 46 fan.c program: 47 47 48 - http://www.lsc-group.phys.uwm.edu/%7E 48 - http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/ 49 49 50 - Gabriele Gorla <gorlik@yahoo.com>, 50 - Gabriele Gorla <gorlik@yahoo.com>, 51 - Jean Delvare <jdelvare@suse.de> 51 - Jean Delvare <jdelvare@suse.de> 52 52 53 Description 53 Description 54 ----------- 54 ----------- 55 55 56 The Standard Microsystems Corporation (SMSC) 4 56 The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips 57 contain monitoring and PWM control circuitry f 57 contain monitoring and PWM control circuitry for two fans. 58 58 59 The LPC47M15x, LPC47M192 and LPC47M292 chips c 59 The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware 60 monitoring block' in addition to the fan monit 60 monitoring block' in addition to the fan monitoring and control. The 61 hardware monitoring block is not supported by 61 hardware monitoring block is not supported by this driver, use the 62 smsc47m192 driver for that. 62 smsc47m192 driver for that. 63 63 64 No documentation is available for the 47M997, 64 No documentation is available for the 47M997, but it has the same device 65 ID as the 47M15x and 47M192 chips and seems to 65 ID as the 47M15x and 47M192 chips and seems to be compatible. 66 66 67 Fan rotation speeds are reported in RPM (rotat 67 Fan rotation speeds are reported in RPM (rotations per minute). An alarm is 68 triggered if the rotation speed has dropped be 68 triggered if the rotation speed has dropped below a programmable limit. Fan 69 readings can be divided by a programmable divi 69 readings can be divided by a programmable divider (1, 2, 4 or 8) to give 70 the readings more range or accuracy. Not all R 70 the readings more range or accuracy. Not all RPM values can accurately be 71 represented, so some rounding is done. With a 71 represented, so some rounding is done. With a divider of 2, the lowest 72 representable value is around 2600 RPM. 72 representable value is around 2600 RPM. 73 73 74 PWM values are from 0 to 255. 74 PWM values are from 0 to 255. 75 75 76 If an alarm triggers, it will remain triggered 76 If an alarm triggers, it will remain triggered until the hardware register 77 is read at least once. This means that the cau 77 is read at least once. This means that the cause for the alarm may 78 already have disappeared! Note that in the cur 78 already have disappeared! Note that in the current implementation, all 79 hardware registers are read whenever any data 79 hardware registers are read whenever any data is read (unless it is less 80 than 1.5 seconds since the last update). This 80 than 1.5 seconds since the last update). This means that you can easily 81 miss once-only alarms. 81 miss once-only alarms. 82 82 83 ---------------------------------------------- 83 ------------------------------------------------------------------ 84 84 85 The lm_sensors project gratefully acknowledges 85 The lm_sensors project gratefully acknowledges the support of 86 Intel in the development of this driver. 86 Intel in the development of this driver.
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