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Linux/Documentation/i2c/busses/i2c-i801.rst

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Diff markup

Differences between /Documentation/i2c/busses/i2c-i801.rst (Version linux-6.12-rc7) and /Documentation/i2c/busses/i2c-i801.rst (Version linux-5.0.21)


  1 ======================                            
  2 Kernel driver i2c-i801                            
  3 ======================                            
  4                                                   
  5                                                   
  6 Supported adapters:                               
  7   * Intel 82801AA and 82801AB (ICH and ICH0 -     
  8     '810' and '810E' chipsets)                    
  9   * Intel 82801BA (ICH2 - part of the '815E' c    
 10   * Intel 82801CA/CAM (ICH3)                      
 11   * Intel 82801DB (ICH4) (HW PEC supported)       
 12   * Intel 82801EB/ER (ICH5) (HW PEC supported)    
 13   * Intel 6300ESB                                 
 14   * Intel 82801FB/FR/FW/FRW (ICH6)                
 15   * Intel 82801G (ICH7)                           
 16   * Intel 631xESB/632xESB (ESB2)                  
 17   * Intel 82801H (ICH8)                           
 18   * Intel 82801I (ICH9)                           
 19   * Intel EP80579 (Tolapai)                       
 20   * Intel 82801JI (ICH10)                         
 21   * Intel 5/3400 Series (PCH)                     
 22   * Intel 6 Series (PCH)                          
 23   * Intel Patsburg (PCH)                          
 24   * Intel DH89xxCC (PCH)                          
 25   * Intel Panther Point (PCH)                     
 26   * Intel Lynx Point (PCH)                        
 27   * Intel Avoton (SOC)                            
 28   * Intel Wellsburg (PCH)                         
 29   * Intel Coleto Creek (PCH)                      
 30   * Intel Wildcat Point (PCH)                     
 31   * Intel BayTrail (SOC)                          
 32   * Intel Braswell (SOC)                          
 33   * Intel Sunrise Point (PCH)                     
 34   * Intel Kaby Lake (PCH)                         
 35   * Intel DNV (SOC)                               
 36   * Intel Broxton (SOC)                           
 37   * Intel Lewisburg (PCH)                         
 38   * Intel Gemini Lake (SOC)                       
 39   * Intel Cannon Lake (PCH)                       
 40   * Intel Cedar Fork (PCH)                        
 41   * Intel Ice Lake (PCH)                          
 42   * Intel Comet Lake (PCH)                        
 43   * Intel Elkhart Lake (PCH)                      
 44   * Intel Tiger Lake (PCH)                        
 45   * Intel Jasper Lake (SOC)                       
 46   * Intel Emmitsburg (PCH)                        
 47   * Intel Alder Lake (PCH)                        
 48   * Intel Raptor Lake (PCH)                       
 49   * Intel Meteor Lake (SOC and PCH)               
 50   * Intel Birch Stream (SOC)                      
 51   * Intel Arrow Lake (SOC)                        
 52                                                   
 53    Datasheets: Publicly available at the Intel    
 54                                                   
 55 On Intel Patsburg and later chipsets, both the    
 56 and the additional 'Integrated Device Function    
 57                                                   
 58 Authors:                                          
 59         - Mark Studebaker <mdsxyz123@yahoo.com>    
 60         - Jean Delvare <jdelvare@suse.de>          
 61                                                   
 62                                                   
 63 Module Parameters                                 
 64 -----------------                                 
 65                                                   
 66 * disable_features (bit vector)                   
 67                                                   
 68 Disable selected features normally supported b    
 69 possible to work around possible driver or har    
 70 question doesn't work as intended for whatever    
 71                                                   
 72  ====  =======================================    
 73  0x01  disable SMBus PEC                          
 74  0x02  disable the block buffer                   
 75  0x08  disable the I2C block read functionalit    
 76  0x10  don't use interrupts                       
 77  0x20  disable SMBus Host Notify                  
 78  ====  =======================================    
 79                                                   
 80                                                   
 81 Description                                       
 82 -----------                                       
 83                                                   
 84 The ICH (properly known as the 82801AA), ICH0     
 85 ICH3 (82801CA/CAM) and later devices (PCH) are    
 86 Intel's '810' chipset for Celeron-based PCs, '    
 87 Pentium-based PCs, '815E' chipset, and others.    
 88                                                   
 89 The ICH chips contain at least SEVEN separate     
 90 PCI devices. An output of lspci will show some    
 91 following::                                       
 92                                                   
 93   00:1e.0 PCI bridge: Intel Corporation: Unkno    
 94   00:1f.0 ISA bridge: Intel Corporation: Unkno    
 95   00:1f.1 IDE interface: Intel Corporation: Un    
 96   00:1f.2 USB Controller: Intel Corporation: U    
 97   00:1f.3 Unknown class [0c05]: Intel Corporat    
 98                                                   
 99 The SMBus controller is function 3 in device 1    
100 Controller.                                       
101                                                   
102 The ICH chips are quite similar to Intel's PII    
103 SMBus controller.                                 
104                                                   
105                                                   
106 Process Call Support                              
107 --------------------                              
108                                                   
109 Block process call is supported on the 82801EB    
110                                                   
111                                                   
112 I2C Block Read Support                            
113 ----------------------                            
114                                                   
115 I2C block read is supported on the 82801EB (IC    
116                                                   
117                                                   
118 SMBus 2.0 Support                                 
119 -----------------                                 
120                                                   
121 The 82801DB (ICH4) and later chips support sev    
122                                                   
123                                                   
124 Interrupt Support                                 
125 -----------------                                 
126                                                   
127 PCI interrupt support is supported on the 8280    
128                                                   
129                                                   
130 Hidden ICH SMBus                                  
131 ----------------                                  
132                                                   
133 If your system has an Intel ICH south bridge,     
134 SMBus device at 00:1f.3 in lspci, and you can'    
135 BIOS to enable it, it means it has been hidden    
136 well known for first doing this on their P4B m    
137 boards after that. Some vendor machines are af    
138                                                   
139 The first thing to try is the "i2c-scmi" ACPI     
140 SMBus was hidden on purpose because it'll be d    
141 i2c-scmi driver works for you, just forget abo    
142 don't try to unhide the ICH SMBus. Even if i2c    
143 better make sure that the SMBus isn't used by     
144 the "fan" and "thermal" drivers, and check in     
145 find a thermal zone with type "acpitz", it's l    
146 accessing the SMBus and it's safer not to unhi    
147 certain that ACPI isn't using the SMBus, you c    
148                                                   
149 In order to unhide the SMBus, we need to chang    
150 register before the kernel enumerates the PCI     
151 drivers/pci/quirks.c, where all affected board    
152 function asus_hides_smbus_hostbridge.) If the     
153 and you think there's something interesting on    
154 hardware monitoring chip), you need to add you    
155                                                   
156 The motherboard is identified using the subven    
157 host bridge PCI device. Get yours with ``lspci    
158                                                   
159   00:00.0 Class 0600: 8086:2570 (rev 02)          
160           Subsystem: 1043:80f2                    
161           Flags: bus master, fast devsel, late    
162           Memory at fc000000 (32-bit, prefetch    
163           Capabilities: [e4] #09 [2106]           
164           Capabilities: [a0] AGP version 3.0      
165                                                   
166 Here the host bridge ID is 2570 (82865G/PE/P),    
167 (Asus) and the subdevice ID is 80f2 (P4P800-X)    
168 names for the bridge ID and the subvendor ID i    
169 and then add a case for your subdevice ID at t    
170 drivers/pci/quirks.c. Then please give it very    
171 that the unhidden SMBus doesn't conflict with     
172                                                   
173 If it works, proves useful (i.e. there are usa    
174 and seems safe, please submit a patch for incl    
175                                                   
176 Note: There's a useful script in lm_sensors 2.    
177 unhide_ICH_SMBus (in prog/hotplug), which uses    
178 temporarily unhide the SMBus without having to    
179 kernel. It's very convenient if you just want     
180 anything interesting on your hidden ICH SMBus.    
181                                                   
182                                                   
183 ----------------------------------------------    
184                                                   
185 The lm_sensors project gratefully acknowledges    
186 Instruments in the initial development of this    
187                                                   
188 The lm_sensors project gratefully acknowledges    
189 development of SMBus 2.0 / ICH4 features of th    
                                                      

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