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Linux/Documentation/i2c/busses/i2c-ismt.rst

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Diff markup

Differences between /Documentation/i2c/busses/i2c-ismt.rst (Architecture sparc64) and /Documentation/i2c/busses/i2c-ismt.rst (Architecture sparc)


  1 ======================                              1 ======================
  2 Kernel driver i2c-ismt                              2 Kernel driver i2c-ismt
  3 ======================                              3 ======================
  4                                                     4 
  5                                                     5 
  6 Supported adapters:                                 6 Supported adapters:
  7   * Intel S12xx series SOCs                         7   * Intel S12xx series SOCs
  8                                                     8 
  9 Authors:                                            9 Authors:
 10         Bill Brown <bill.e.brown@intel.com>         10         Bill Brown <bill.e.brown@intel.com>
 11                                                    11 
 12                                                    12 
 13 Module Parameters                                  13 Module Parameters
 14 -----------------                                  14 -----------------
 15                                                    15 
 16 * bus_speed (unsigned int)                         16 * bus_speed (unsigned int)
 17                                                    17 
 18 Allows changing of the bus speed.  Normally, t     18 Allows changing of the bus speed.  Normally, the bus speed is set by the BIOS
 19 and never needs to be changed.  However, some      19 and never needs to be changed.  However, some SMBus analyzers are too slow for
 20 monitoring the bus during debug, thus the need     20 monitoring the bus during debug, thus the need for this module parameter.
 21 Specify the bus speed in kHz.                      21 Specify the bus speed in kHz.
 22                                                    22 
 23 Available bus frequency settings:                  23 Available bus frequency settings:
 24                                                    24 
 25   ====   =========                                 25   ====   =========
 26   0      no change                                 26   0      no change
 27   80     kHz                                       27   80     kHz
 28   100    kHz                                       28   100    kHz
 29   400    kHz                                       29   400    kHz
 30   1000   kHz                                       30   1000   kHz
 31   ====   =========                                 31   ====   =========
 32                                                    32 
 33                                                    33 
 34 Description                                        34 Description
 35 -----------                                        35 -----------
 36                                                    36 
 37 The S12xx series of SOCs have a pair of integr     37 The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
 38 targeted primarily at the microserver and stor     38 targeted primarily at the microserver and storage markets.
 39                                                    39 
 40 The S12xx series contain a pair of PCI functio     40 The S12xx series contain a pair of PCI functions.  An output of lspci will show
 41 something similar to the following::               41 something similar to the following::
 42                                                    42 
 43   00:13.0 System peripheral: Intel Corporation     43   00:13.0 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 0
 44   00:13.1 System peripheral: Intel Corporation     44   00:13.1 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 1
                                                      

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