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Linux/Documentation/i2c/busses/i2c-mlxcpld.rst

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Diff markup

Differences between /Documentation/i2c/busses/i2c-mlxcpld.rst (Version linux-6.12-rc7) and /Documentation/i2c/busses/i2c-mlxcpld.rst (Version linux-5.3.18)


  1 ==================                                
  2 Driver i2c-mlxcpld                                
  3 ==================                                
  4                                                   
  5 Author: Michael Shych <michaelsh@mellanox.com>     
  6                                                   
  7 This is the Mellanox I2C controller logic, imp    
  8 device.                                           
  9                                                   
 10 Device supports:                                  
 11  - Master mode.                                   
 12  - One physical bus.                              
 13  - Polling mode.                                  
 14                                                   
 15 This controller is equipped within the next Me    
 16 "msx6710", "msx6720", "msb7700", "msn2700", "m    
 17 "msn2740", "msn2100".                             
 18                                                   
 19 The next transaction types are supported:         
 20  - Receive Byte/Block.                            
 21  - Send Byte/Block.                               
 22  - Read Byte/Block.                               
 23  - Write Byte/Block.                              
 24                                                   
 25 Registers:                                        
 26                                                   
 27 =============== === ==========================    
 28 CPBLTY          0x0 - capability reg.             
 29                         Bits [6:5] - transacti    
 30                         36B in other case.        
 31                         Bit 7 - SMBus block re    
 32 CTRL            0x1 - control reg.                
 33                         Resets all the registe    
 34 HALF_CYC        0x4 - cycle reg.                  
 35                         Configure the width of    
 36                         units).                   
 37 I2C_HOLD        0x5 - hold reg.                   
 38                         OE (output enable) is     
 39                         (in LPC_CLK units)        
 40 CMD                     0x6 - command reg.        
 41                         Bit 0, 0 = write, 1 =     
 42                         Bits [7:1] - the 7bit     
 43                         It should be written l    
 44 NUM_DATA        0x7 - data size reg.              
 45                         Number of data bytes t    
 46 NUM_ADDR        0x8 - address reg.                
 47                         Number of address byte    
 48 STATUS          0x9 - status reg.                 
 49                         Bit 0 - transaction is    
 50                         Bit 4 - ACK/NACK.         
 51 DATAx           0xa - 0x54  - 68 bytes data bu    
 52                         For write transaction     
 53                         (DATA1 - DATA4), data     
 54                         For read transactions     
 55                         specified in the four     
 56                         starting from DATA0.      
 57 =============== === ==========================    
                                                      

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