~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/Documentation/i2c/busses/i2c-piix4.rst

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /Documentation/i2c/busses/i2c-piix4.rst (Architecture i386) and /Documentation/i2c/busses/i2c-piix4.rst (Architecture mips)


  1 =======================                             1 =======================
  2 Kernel driver i2c-piix4                             2 Kernel driver i2c-piix4
  3 =======================                             3 =======================
  4                                                     4 
  5 Supported adapters:                                 5 Supported adapters:
  6   * Intel 82371AB PIIX4 and PIIX4E                  6   * Intel 82371AB PIIX4 and PIIX4E
  7   * Intel 82443MX (440MX)                           7   * Intel 82443MX (440MX)
  8     Datasheet: Publicly available at the Intel      8     Datasheet: Publicly available at the Intel website
  9   * ServerWorks OSB4, CSB5, CSB6, HT-1000 and       9   * ServerWorks OSB4, CSB5, CSB6, HT-1000 and HT-1100 southbridges
 10     Datasheet: Only available via NDA from Ser     10     Datasheet: Only available via NDA from ServerWorks
 11   * ATI IXP200, IXP300, IXP400, SB600, SB700 a     11   * ATI IXP200, IXP300, IXP400, SB600, SB700 and SB800 southbridges
 12     Datasheet: Not publicly available              12     Datasheet: Not publicly available
 13     SB700 register reference available at:         13     SB700 register reference available at:
 14     http://support.amd.com/us/Embedded_TechDoc     14     http://support.amd.com/us/Embedded_TechDocs/43009_sb7xx_rrg_pub_1.00.pdf
 15   * AMD SP5100 (SB700 derivative found on some     15   * AMD SP5100 (SB700 derivative found on some server mainboards)
 16     Datasheet: Publicly available at the AMD w     16     Datasheet: Publicly available at the AMD website
 17     http://support.amd.com/us/Embedded_TechDoc     17     http://support.amd.com/us/Embedded_TechDocs/44413.pdf
 18   * AMD Hudson-2, ML, CZ                           18   * AMD Hudson-2, ML, CZ
 19     Datasheet: Not publicly available              19     Datasheet: Not publicly available
 20   * Hygon CZ                                       20   * Hygon CZ
 21     Datasheet: Not publicly available              21     Datasheet: Not publicly available
 22   * Standard Microsystems (SMSC) SLC90E66 (Vic     22   * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge
 23     Datasheet: Publicly available at the SMSC      23     Datasheet: Publicly available at the SMSC website http://www.smsc.com
 24                                                    24 
 25 Authors:                                           25 Authors:
 26         - Frodo Looijaard <frodol@dds.nl>           26         - Frodo Looijaard <frodol@dds.nl>
 27         - Philip Edelbrock <phil@netroedge.com>     27         - Philip Edelbrock <phil@netroedge.com>
 28                                                    28 
 29                                                    29 
 30 Module Parameters                                  30 Module Parameters
 31 -----------------                                  31 -----------------
 32                                                    32 
 33 * force: int                                       33 * force: int
 34   Forcibly enable the PIIX4. DANGEROUS!            34   Forcibly enable the PIIX4. DANGEROUS!
 35 * force_addr: int                                  35 * force_addr: int
 36   Forcibly enable the PIIX4 at the given addre     36   Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
 37                                                    37 
 38                                                    38 
 39 Description                                        39 Description
 40 -----------                                        40 -----------
 41                                                    41 
 42 The PIIX4 (properly known as the 82371AB) is a     42 The PIIX4 (properly known as the 82371AB) is an Intel chip with a lot of
 43 functionality. Among other things, it implemen     43 functionality. Among other things, it implements the PCI bus. One of its
 44 minor functions is implementing a System Manag     44 minor functions is implementing a System Management Bus. This is a true
 45 SMBus - you can not access it on I2C levels. T     45 SMBus - you can not access it on I2C levels. The good news is that it
 46 natively understands SMBus commands and you do     46 natively understands SMBus commands and you do not have to worry about
 47 timing problems. The bad news is that non-SMBu     47 timing problems. The bad news is that non-SMBus devices connected to it can
 48 confuse it mightily. Yes, this is known to hap     48 confuse it mightily. Yes, this is known to happen...
 49                                                    49 
 50 Do ``lspci -v`` and see whether it contains an     50 Do ``lspci -v`` and see whether it contains an entry like this::
 51                                                    51 
 52   0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/     52   0000:00:02.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02)
 53                Flags: medium devsel, IRQ 9         53                Flags: medium devsel, IRQ 9
 54                                                    54 
 55 Bus and device numbers may differ, but the fun     55 Bus and device numbers may differ, but the function number must be
 56 identical (like many PCI devices, the PIIX4 in     56 identical (like many PCI devices, the PIIX4 incorporates a number of
 57 different 'functions', which can be considered     57 different 'functions', which can be considered as separate devices). If you
 58 find such an entry, you have a PIIX4 SMBus con     58 find such an entry, you have a PIIX4 SMBus controller.
 59                                                    59 
 60 On some computers (most notably, some Dells),      60 On some computers (most notably, some Dells), the SMBus is disabled by
 61 default. If you use the insmod parameter 'forc     61 default. If you use the insmod parameter 'force=1', the kernel module will
 62 try to enable it. THIS IS VERY DANGEROUS! If t     62 try to enable it. THIS IS VERY DANGEROUS! If the BIOS did not set up a
 63 correct address for this module, you could get     63 correct address for this module, you could get in big trouble (read:
 64 crashes, data corruption, etc.). Try this only     64 crashes, data corruption, etc.). Try this only as a last resort (try BIOS
 65 updates first, for example), and backup first!     65 updates first, for example), and backup first! An even more dangerous
 66 option is 'force_addr=<IOPORT>'. This will not     66 option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
 67 'force' does, but it will also set a new base      67 'force' does, but it will also set a new base I/O port address. The SMBus
 68 parts of the PIIX4 needs a range of 8 of these     68 parts of the PIIX4 needs a range of 8 of these addresses to function
 69 correctly. If these addresses are already rese     69 correctly. If these addresses are already reserved by some other device,
 70 you will get into big trouble! DON'T USE THIS      70 you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
 71 ABOUT WHAT YOU ARE DOING!                          71 ABOUT WHAT YOU ARE DOING!
 72                                                    72 
 73 The PIIX4E is just an new version of the PIIX4     73 The PIIX4E is just an new version of the PIIX4; it is supported as well.
 74 The PIIX/PIIX3 does not implement an SMBus or      74 The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use
 75 this driver on those mainboards.                   75 this driver on those mainboards.
 76                                                    76 
 77 The ServerWorks Southbridges, the Intel 440MX,     77 The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
 78 identical to the PIIX4 in I2C/SMBus support.       78 identical to the PIIX4 in I2C/SMBus support.
 79                                                    79 
 80 The AMD SB700, SB800, SP5100 and Hudson-2 chip     80 The AMD SB700, SB800, SP5100 and Hudson-2 chipsets implement two
 81 PIIX4-compatible SMBus controllers. If your BI     81 PIIX4-compatible SMBus controllers. If your BIOS initializes the
 82 secondary controller, it will be detected by t     82 secondary controller, it will be detected by this driver as
 83 an "Auxiliary SMBus Host Controller".              83 an "Auxiliary SMBus Host Controller".
 84                                                    84 
 85 If you own Force CPCI735 motherboard or other      85 If you own Force CPCI735 motherboard or other OSB4 based systems you may need
 86 to change the SMBus Interrupt Select register      86 to change the SMBus Interrupt Select register so the SMBus controller uses
 87 the SMI mode.                                      87 the SMI mode.
 88                                                    88 
 89 1) Use ``lspci`` command and locate the PCI de     89 1) Use ``lspci`` command and locate the PCI device with the SMBus controller:
 90    00:0f.0 ISA bridge: ServerWorks OSB4 South      90    00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
 91    The line may vary for different chipsets. P     91    The line may vary for different chipsets. Please consult the driver source
 92    for all possible PCI ids (and ``lspci -n``      92    for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the
 93    device is located at 00:0f.0.                   93    device is located at 00:0f.0.
 94 2) Now you just need to change the value in 0x     94 2) Now you just need to change the value in 0xD2 register. Get it first with
 95    command: ``lspci -xxx -s 00:0f.0``              95    command: ``lspci -xxx -s 00:0f.0``
 96    If the value is 0x3 then you need to change     96    If the value is 0x3 then you need to change it to 0x1:
 97    ``setpci  -s 00:0f.0 d2.b=1``                   97    ``setpci  -s 00:0f.0 d2.b=1``
 98                                                    98 
 99 Please note that you don't need to do that in      99 Please note that you don't need to do that in all cases, just when the SMBus is
100 not working properly.                             100 not working properly.
101                                                   101 
102                                                   102 
103 Hardware-specific issues                          103 Hardware-specific issues
104 ------------------------                          104 ------------------------
105                                                   105 
106 This driver will refuse to load on IBM systems    106 This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus.
107 Some of these machines have an RFID EEPROM (24    107 Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus,
108 which can easily get corrupted due to a state     108 which can easily get corrupted due to a state machine bug. These are mostly
109 Thinkpad laptops, but desktop systems may also    109 Thinkpad laptops, but desktop systems may also be affected. We have no list
110 of all affected systems, so the only safe solu    110 of all affected systems, so the only safe solution was to prevent access to
111 the SMBus on all IBM systems (detected using D    111 the SMBus on all IBM systems (detected using DMI data.)
                                                      

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php